diff for duplicates of <20160114222046.GH3818@linux.vnet.ibm.com> diff --git a/a/content_digest b/N1/content_digest index 7f979c1..6508879 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -36,7 +36,15 @@ linux-mips@linux-mips.org x86@kernel.org user-mode-linux-devel@lists.sourceforge.net - " adi-buildroot-devel@lists.sourceforge.netlin\0" + adi-buildroot-devel@lists.sourceforge.net + linux-sh@vger.kernel.org + linux-xtensa@linux-xtensa.org + xen-devel@lists.xenproject.org + Ralf Baechle <ralf@linux-mips.org> + Ingo Molnar <mingo@kernel.org> + ddaney.cavm@gmail.com + james.hogan@imgtec.com + " Michael Ellerman <mpe@ellerman.id.au>\0" "\00:1\0" "b\0" "On Thu, Jan 14, 2016 at 01:24:34PM -0800, Leonid Yegoshin wrote:\n" @@ -178,4 +186,4 @@ " machines with split caches, so that, for example, one cache bank processes\n" even-numbered cache lines and the other bank processes odd-numbered cache -2cdca83a743acd1ac679da18e0468777e3c66184b0351274924b8a397c215c7c +a8ca963020a9122750f47b3c5f479d5f79405ba173885adae57c120f3d8a947f
diff --git a/a/1.txt b/N2/1.txt index 2b2ca43..37d4054 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -112,8 +112,7 @@ index f49c15f7864f..c66ba46d8079 100644 +A data-dependency barrier must also order against dependent writes: + + CPU 1 CPU 2 -+ =============== =============== -+ { A == 1, B == 2, C = 3, P == &A, Q == &C } ++ ======== =======+ { A = 1, B = 2, C = 3, P = &A, Q = &C } + B = 4; + <write barrier> + WRITE_ONCE(P, &B); @@ -124,7 +123,7 @@ index f49c15f7864f..c66ba46d8079 100644 +The data-dependency barrier must order the read into Q with the store +into *Q. This prohibits this outcome: + -+ (Q == B) && (B == 4) ++ (Q = B) && (B = 4) + +Please note that this pattern should be rare. After all, the whole point +of dependency ordering is to -prevent- writes to the data structure, along diff --git a/a/content_digest b/N2/content_digest index 7f979c1..6c07e39 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -10,7 +10,7 @@ "ref\056981212.7050301@imgtec.com\0" "From\0Paul E. McKenney <paulmck@linux.vnet.ibm.com>\0" "Subject\0Re: [v3,11/41] mips: reuse asm-generic/barrier.h\0" - "Date\0Thu, 14 Jan 2016 14:20:46 -0800\0" + "Date\0Thu, 14 Jan 2016 22:20:46 +0000\0" "To\0Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>\0" "Cc\0Will Deacon <will.deacon@arm.com>" Peter Zijlstra <peterz@infradead.org> @@ -153,8 +153,7 @@ "+A data-dependency barrier must also order against dependent writes:\n" "+\n" "+\tCPU 1\t\t CPU 2\n" - "+\t===============\t ===============\n" - "+\t{ A == 1, B == 2, C = 3, P == &A, Q == &C }\n" + "+\t========\t =======+\t{ A = 1, B = 2, C = 3, P = &A, Q = &C }\n" "+\tB = 4;\n" "+\t<write barrier>\n" "+\tWRITE_ONCE(P, &B);\n" @@ -165,7 +164,7 @@ "+The data-dependency barrier must order the read into Q with the store\n" "+into *Q. This prohibits this outcome:\n" "+\n" - "+\t(Q == B) && (B == 4)\n" + "+\t(Q = B) && (B = 4)\n" "+\n" "+Please note that this pattern should be rare. After all, the whole point\n" "+of dependency ordering is to -prevent- writes to the data structure, along\n" @@ -178,4 +177,4 @@ " machines with split caches, so that, for example, one cache bank processes\n" even-numbered cache lines and the other bank processes odd-numbered cache -2cdca83a743acd1ac679da18e0468777e3c66184b0351274924b8a397c215c7c +992a586fa31fff0bbf56eafe8588d7e3e34cf3ca6101b615753d651c79d9e6d6
diff --git a/a/content_digest b/N3/content_digest index 7f979c1..3411d7d 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -36,7 +36,8 @@ linux-mips@linux-mips.org x86@kernel.org user-mode-linux-devel@lists.sourceforge.net - " adi-buildroot-devel@lists.sourceforge.netlin\0" + adi-buildroot-devel@lists.sourceforge.net + " lin\0" "\00:1\0" "b\0" "On Thu, Jan 14, 2016 at 01:24:34PM -0800, Leonid Yegoshin wrote:\n" @@ -178,4 +179,4 @@ " machines with split caches, so that, for example, one cache bank processes\n" even-numbered cache lines and the other bank processes odd-numbered cache -2cdca83a743acd1ac679da18e0468777e3c66184b0351274924b8a397c215c7c +4929552f498f328dda63f69b547a48c1e8a84976ae7f923540bd8f8731efae40
diff --git a/a/content_digest b/N4/content_digest index 7f979c1..973fac0 100644 --- a/a/content_digest +++ b/N4/content_digest @@ -8,35 +8,10 @@ "ref\056980145.5030901@imgtec.com\0" "ref\020160114204827.GE3818@linux.vnet.ibm.com\0" "ref\056981212.7050301@imgtec.com\0" - "From\0Paul E. McKenney <paulmck@linux.vnet.ibm.com>\0" - "Subject\0Re: [v3,11/41] mips: reuse asm-generic/barrier.h\0" + "From\0paulmck@linux.vnet.ibm.com (Paul E. McKenney)\0" + "Subject\0[v3,11/41] mips: reuse asm-generic/barrier.h\0" "Date\0Thu, 14 Jan 2016 14:20:46 -0800\0" - "To\0Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>\0" - "Cc\0Will Deacon <will.deacon@arm.com>" - Peter Zijlstra <peterz@infradead.org> - Michael S. Tsirkin <mst@redhat.com> - linux-kernel@vger.kernel.org - Arnd Bergmann <arnd@arndb.de> - linux-arch@vger.kernel.org - Andrew Cooper <andrew.cooper3@citrix.com> - Russell King - ARM Linux <linux@arm.linux.org.uk> - virtualization@lists.linux-foundation.org - Stefano Stabellini <stefano.stabellini@eu.citrix.com> - Thomas Gleixner <tglx@linutronix.de> - Ingo Molnar <mingo@elte.hu> - H. Peter Anvin <hpa@zytor.com> - Joe Perches <joe@perches.com> - David Miller <davem@davemloft.net> - linux-ia64@vger.kernel.org - linuxppc-dev@lists.ozlabs.org - linux-s390@vger.kernel.org - sparclinux@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-metag@vger.kernel.org - linux-mips@linux-mips.org - x86@kernel.org - user-mode-linux-devel@lists.sourceforge.net - " adi-buildroot-devel@lists.sourceforge.netlin\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Thu, Jan 14, 2016 at 01:24:34PM -0800, Leonid Yegoshin wrote:\n" @@ -178,4 +153,4 @@ " machines with split caches, so that, for example, one cache bank processes\n" even-numbered cache lines and the other bank processes odd-numbered cache -2cdca83a743acd1ac679da18e0468777e3c66184b0351274924b8a397c215c7c +3d35ebc53761b19772bd05979b1a7c31d3f23ed4d423823d5740310205f4d4dc
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