From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Thu, 14 Jan 2016 21:01:33 -0600 From: Rob Herring To: Maxime Ripard Cc: Mike Turquette , Stephen Boyd , David Airlie , Thierry Reding , Philipp Zabel , Thomas Petazzoni , devicetree@vger.kernel.org, Boris Brezillon , Wynter Woods , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Hans de Goede , linux-sunxi@googlegroups.com, Rob Clark , Laurent Pinchart , Daniel Vetter , Alexander Kaplan , Chen-Yu Tsai , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver Message-ID: <20160115030133.GA17174@rob-hp-laptop> References: <1452785109-6172-1-git-send-email-maxime.ripard@free-electrons.com> <1452785109-6172-6-git-send-email-maxime.ripard@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1452785109-6172-6-git-send-email-maxime.ripard@free-electrons.com> List-ID: On Thu, Jan 14, 2016 at 04:24:48PM +0100, Maxime Ripard wrote: > The A10 SoCs and its relatives has a special clock controller to drive the > display engines (both frontend and backend), that have a lot in common with > the clock to drive the first TCON channel. > > Add a driver to support both. > > Signed-off-by: Maxime Ripard > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 2 + Can't someone read the datasheet and add these compatible strings in one pass instead of one at a time? Acked-by: Rob Herring > drivers/clk/sunxi/Makefile | 1 + > drivers/clk/sunxi/clk-sun4i-display.c | 241 ++++++++++++++++++++++ > 3 files changed, 244 insertions(+) > create mode 100644 drivers/clk/sunxi/clk-sun4i-display.c From mboxrd@z Thu Jan 1 00:00:00 1970 From: robh@kernel.org (Rob Herring) Date: Thu, 14 Jan 2016 21:01:33 -0600 Subject: [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver In-Reply-To: <1452785109-6172-6-git-send-email-maxime.ripard@free-electrons.com> References: <1452785109-6172-1-git-send-email-maxime.ripard@free-electrons.com> <1452785109-6172-6-git-send-email-maxime.ripard@free-electrons.com> Message-ID: <20160115030133.GA17174@rob-hp-laptop> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Jan 14, 2016 at 04:24:48PM +0100, Maxime Ripard wrote: > The A10 SoCs and its relatives has a special clock controller to drive the > display engines (both frontend and backend), that have a lot in common with > the clock to drive the first TCON channel. > > Add a driver to support both. > > Signed-off-by: Maxime Ripard > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 2 + Can't someone read the datasheet and add these compatible strings in one pass instead of one at a time? Acked-by: Rob Herring > drivers/clk/sunxi/Makefile | 1 + > drivers/clk/sunxi/clk-sun4i-display.c | 241 ++++++++++++++++++++++ > 3 files changed, 244 insertions(+) > create mode 100644 drivers/clk/sunxi/clk-sun4i-display.c From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver Date: Thu, 14 Jan 2016 21:01:33 -0600 Message-ID: <20160115030133.GA17174@rob-hp-laptop> References: <1452785109-6172-1-git-send-email-maxime.ripard@free-electrons.com> <1452785109-6172-6-git-send-email-maxime.ripard@free-electrons.com> Reply-To: robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Content-Disposition: inline In-Reply-To: <1452785109-6172-6-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Maxime Ripard Cc: Mike Turquette , Stephen Boyd , David Airlie , Thierry Reding , Philipp Zabel , Thomas Petazzoni , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Boris Brezillon , Wynter Woods , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Hans de Goede , linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Rob Clark , Laurent Pinchart , Daniel Vetter , Alexander Kaplan , Chen-Yu Tsai , linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org On Thu, Jan 14, 2016 at 04:24:48PM +0100, Maxime Ripard wrote: > The A10 SoCs and its relatives has a special clock controller to drive the > display engines (both frontend and backend), that have a lot in common with > the clock to drive the first TCON channel. > > Add a driver to support both. > > Signed-off-by: Maxime Ripard > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 2 + Can't someone read the datasheet and add these compatible strings in one pass instead of one at a time? Acked-by: Rob Herring > drivers/clk/sunxi/Makefile | 1 + > drivers/clk/sunxi/clk-sun4i-display.c | 241 ++++++++++++++++++++++ > 3 files changed, 244 insertions(+) > create mode 100644 drivers/clk/sunxi/clk-sun4i-display.c