From: Daniel Vetter <daniel@ffwll.ch>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 17/18] drm/i915: Pass around plane_state instead of fb+rotation
Date: Mon, 25 Jan 2016 18:55:48 +0100 [thread overview]
Message-ID: <20160125175548.GL11240@phenom.ffwll.local> (raw)
In-Reply-To: <1453316739-13296-18-git-send-email-ville.syrjala@linux.intel.com>
On Wed, Jan 20, 2016 at 09:05:38PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_compute_tile_offset() and intel_add_fb_offsets() get passed the fb
> and the rotation. As both of those come from the plane state we can just
> pass that in instead.
>
> For extra consitency pass the plane state to intel_fb_xy_to_linear() as
> well even though it only really needs the fb.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++---------------
> drivers/gpu/drm/i915/intel_drv.h | 9 ++++-----
> drivers/gpu/drm/i915/intel_sprite.c | 22 +++++++++++-----------
> 3 files changed, 35 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index eb8ce8a99291..2e6cbf65b265 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2442,8 +2442,10 @@ static void intel_unpin_fb_obj(struct drm_framebuffer *fb, unsigned int rotation
> * with gen2/3, and 90/270 degree rotations isn't supported on any of them.
> */
> unsigned int intel_fb_xy_to_linear(int x, int y,
> - const struct drm_framebuffer *fb, int plane)
> + const struct intel_plane_state *state,
> + int plane)
> {
> + const struct drm_framebuffer *fb = state->base.fb;
> unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
> unsigned int pitch = fb->pitches[plane];
>
> @@ -2456,11 +2458,12 @@ unsigned int intel_fb_xy_to_linear(int x, int y,
> * specify the start of scanout from the beginning of the gtt mapping.
> */
> void intel_add_fb_offsets(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation)
> + const struct intel_plane_state *state,
> + int plane)
>
> {
> - const struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> + const struct intel_framebuffer *intel_fb = to_intel_framebuffer(state->base.fb);
> + unsigned int rotation = state->base.rotation;
>
> if (intel_rotation_90_or_270(rotation)) {
> *x += intel_fb->rotated[plane].x;
> @@ -2561,10 +2564,12 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv,
> }
>
> unsigned int intel_compute_tile_offset(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation)
> + const struct intel_plane_state *state,
> + int plane)
> {
> - const struct drm_i915_private *dev_priv = to_i915(fb->dev);
> + const struct drm_i915_private *dev_priv = to_i915(state->base.plane->dev);
> + const struct drm_framebuffer *fb = state->base.fb;
> + unsigned int rotation = state->base.rotation;
> unsigned int alignment = intel_surf_alignment(dev_priv, fb->modifier[plane]);
> unsigned int pitch;
>
> @@ -2989,11 +2994,11 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
> if (IS_G4X(dev))
> dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
>
> if (INTEL_INFO(dev)->gen >= 4)
> intel_crtc->dspaddr_offset =
> - intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> dspcntr |= DISPPLANE_ROTATE_180;
> @@ -3002,7 +3007,7 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
> y += (crtc_state->pipe_src_h - 1);
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (INTEL_INFO(dev)->gen < 4)
> intel_crtc->dspaddr_offset = linear_offset;
> @@ -3092,10 +3097,10 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
> if (!IS_HASWELL(dev) && !IS_BROADWELL(dev))
> dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
>
> intel_crtc->dspaddr_offset =
> - intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> dspcntr |= DISPPLANE_ROTATE_180;
> @@ -3106,7 +3111,7 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
> }
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> intel_crtc->adjusted_x = x;
> intel_crtc->adjusted_y = y;
> @@ -3314,8 +3319,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
> fb->pixel_format);
> }
>
> - intel_add_fb_offsets(&src_x, &src_y, fb, 0, rotation);
> - surf_addr = intel_compute_tile_offset(&src_x, &src_y, fb, 0, rotation);
> + intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
> + surf_addr = intel_compute_tile_offset(&src_x, &src_y, plane_state, 0);
>
> /* Sizes are 0 based */
> src_w--;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index e3de1fc3b04d..09cfc0eea5a4 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1071,10 +1071,10 @@ void i915_audio_component_cleanup(struct drm_i915_private *dev_priv);
> /* intel_display.c */
> extern const struct drm_plane_funcs intel_plane_funcs;
> unsigned int intel_fb_xy_to_linear(int x, int y,
> - const struct drm_framebuffer *fb, int plane);
> + const struct intel_plane_state *state,
> + int plane);
> void intel_add_fb_offsets(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation);
> + const struct intel_plane_state *state, int plane);
> unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info);
> bool intel_has_pending_fb_unpin(struct drm_device *dev);
> int intel_pch_rawclk(struct drm_device *dev);
> @@ -1189,8 +1189,7 @@ void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
> #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
> #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
> u32 intel_compute_tile_offset(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation);
> + const struct intel_plane_state *state, int plane);
> void intel_prepare_reset(struct drm_device *dev);
> void intel_finish_reset(struct drm_device *dev);
> void hsw_enable_pc8(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 31be24f27207..ad533cc2b5f5 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -249,8 +249,8 @@ skl_update_plane(struct drm_plane *drm_plane,
> fb->pixel_format);
> }
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - surf_addr = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + surf_addr = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> /* Sizes are 0 based */
> src_w--;
> @@ -426,8 +426,8 @@ vlv_update_plane(struct drm_plane *dplane,
> crtc_w--;
> crtc_h--;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> sprctl |= SP_ROTATE_180;
> @@ -436,7 +436,7 @@ vlv_update_plane(struct drm_plane *dplane,
> y += src_h;
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (key->flags) {
> I915_WRITE(SPKEYMINVAL(pipe, plane), key->min_value);
> @@ -557,8 +557,8 @@ ivb_update_plane(struct drm_plane *plane,
> if (crtc_w != src_w || crtc_h != src_h)
> sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> sprctl |= SPRITE_ROTATE_180;
> @@ -570,7 +570,7 @@ ivb_update_plane(struct drm_plane *plane,
> }
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (key->flags) {
> I915_WRITE(SPRKEYVAL(pipe), key->min_value);
> @@ -692,8 +692,8 @@ ilk_update_plane(struct drm_plane *plane,
> if (crtc_w != src_w || crtc_h != src_h)
> dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - dvssurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + dvssurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> dvscntr |= DVS_ROTATE_180;
> @@ -702,7 +702,7 @@ ilk_update_plane(struct drm_plane *plane,
> y += src_h;
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (key->flags) {
> I915_WRITE(DVSKEYVAL(pipe), key->min_value);
> --
> 2.4.10
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-01-25 17:55 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-20 19:05 [PATCH v2 00/18] drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) ville.syrjala
2016-01-20 19:05 ` [PATCH 01/18] drm/i915: Rename the rotated gtt view member to 'rotated' ville.syrjala
2016-01-25 16:50 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 02/18] drm/i915: Pass stride to rotate_pages() ville.syrjala
2016-01-25 16:52 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 03/18] drm/i915: Pass rotation_info to intel_rotate_fb_obj_pages() ville.syrjala
2016-01-25 16:53 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 04/18] drm/i915: Make display gtt offsets u32 ville.syrjala
2016-01-25 17:00 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 05/18] drm/i915: Standardize on 'cpp' for bytes per pixel ville.syrjala
2016-01-25 17:05 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH v2 06/18] drm: Add drm_format_plane_width() and drm_format_plane_height() ville.syrjala
2016-01-25 17:08 ` Daniel Vetter
2016-01-28 18:15 ` Ville Syrjälä
2016-01-29 18:01 ` [PATCH v3 " ville.syrjala
2016-02-09 9:08 ` Daniel Vetter
2016-02-09 15:29 ` [PATCH v4 " ville.syrjala
2016-01-20 19:05 ` [PATCH 07/18] drm/i915: Fix intel_tile_width() parameters ville.syrjala
2016-01-25 17:12 ` Daniel Vetter
2016-01-28 18:35 ` Ville Syrjälä
2016-01-28 19:04 ` Ville Syrjälä
2016-01-20 19:05 ` [PATCH v3 08/18] drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_offset() ville.syrjala
2016-01-25 17:30 ` Daniel Vetter
2016-01-28 18:51 ` Ville Syrjälä
2016-02-10 7:35 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH v2 09/18] drm/i915: Support for extra alignment for tiled surfaces ville.syrjala
2016-01-25 17:24 ` Daniel Vetter
2016-01-25 17:55 ` Ville Syrjälä
2016-01-20 19:05 ` [PATCH v2 10/18] drm/i915: Don't pass plane+plane_state to intel_pin_and_fence_fb_obj() ville.syrjala
2016-01-20 19:05 ` [PATCH 11/18] drm/i915: Pass drm_frambuffer to intel_compute_page_offset() ville.syrjala
2016-01-20 19:05 ` [PATCH 12/18] drm/i915: Reorganize intel_rotation_info ville.syrjala
2016-01-25 17:38 ` Daniel Vetter
2016-01-25 18:03 ` Ville Syrjälä
2016-01-20 19:05 ` [PATCH 13/18] drm/i915: Move the NULL sg handling out from rotate_pages() ville.syrjala
2016-01-25 17:40 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 14/18] drm/i915: Embed rotation_info under intel_framebuffer ville.syrjala
2016-01-20 21:08 ` Chris Wilson
2016-01-21 12:06 ` Ville Syrjälä
2016-01-21 12:10 ` Chris Wilson
2016-01-25 17:42 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH v3 15/18] drm/i915: Rewrite fb rotation GTT handling ville.syrjala
2016-01-20 19:05 ` [PATCH v2 16/18] drm/i915: Don't pass pitch to intel_compute_page_offset() ville.syrjala
2016-01-25 17:53 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 17/18] drm/i915: Pass around plane_state instead of fb+rotation ville.syrjala
2016-01-25 17:55 ` Daniel Vetter [this message]
2016-01-20 19:05 ` [PATCH v2 18/18] drm/i915: Make sure fb offset is (macro)pixel aligned ville.syrjala
2016-01-21 13:35 ` ✓ Fi.CI.BAT: success for drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) Patchwork
2016-01-30 8:31 ` ✗ Fi.CI.BAT: failure for drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) (rev2) Patchwork
2016-02-01 8:31 ` Patchwork
2016-02-09 16:31 ` ✗ Fi.CI.BAT: failure for drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) (rev3) Patchwork
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