From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] armv7: add cacheline sizes where missing
Date: Tue, 26 Jan 2016 21:29:09 -0500 [thread overview]
Message-ID: <20160127022909.GO426@bill-the-cat> (raw)
In-Reply-To: <1453826449-14346-1-git-send-email-albert.u.boot@aribaud.net>
On Tue, Jan 26, 2016 at 05:40:49PM +0100, Albert ARIBAUD wrote:
> Some armv7 targets are missing a cache line size declaration.
> In preparation for "arm: cache: Implement cache range check for v7"
> patch, add these declarations with the appropriate value for
> the target's SoC or CPU.
>
> Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
For the TI boards:
Reviewed-by: Tom Rini <trini@konsulko.com>
--
Tom
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next prev parent reply other threads:[~2016-01-27 2:29 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-26 16:40 [U-Boot] [PATCH] armv7: add cacheline sizes where missing Albert ARIBAUD
2016-01-27 2:29 ` Tom Rini [this message]
2016-01-27 4:10 ` Marek Vasut
2016-01-27 7:11 ` Albert ARIBAUD
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