From: Johannes Stezenbach <js@sig21.net>
To: Felix Fietkau <nbd@openwrt.org>
Cc: linux-wireless@vger.kernel.org
Subject: mt76 tx status
Date: Sun, 31 Jan 2016 23:24:41 +0100 [thread overview]
Message-ID: <20160131222441.GA20283@sig21.net> (raw)
Hi Felix,
I noticed in mt76x2_mac_poll_tx_status() you are reading
MT_TX_STAT_FIFO before reading MT_TX_STAT_FIFO_EXT,
however I have a hunch that reading MT_TX_STAT_FIFO clobbers
the corresponding MT_TX_STAT_FIFO_EXT since MT_TX_STAT_FIFO
has the valid bit, and both registers together seem to implement
reading a 64bit FIFO entry. I.e. you need to read
MT_TX_STAT_FIFO_EXT first otherwise you get a mix from
two FIFO entries.
I played a bit with the vendor driver for the mt7610u
and confirmed that multiple reads from MT_TX_STAT_FIFO_EXT
return the same value until MT_TX_STAT_FIFO is read.
(Note the mt7610u vendor driver does not define FIFO_EXT_SUPPORT
but the FIFO seems to exist in hardware. The mt7612u vendor driver
code reads the MT_TX_STAT_FIFO_EXT first.)
Johannes
next reply other threads:[~2016-01-31 22:24 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-31 22:24 Johannes Stezenbach [this message]
2016-02-01 12:28 ` mt76 tx status Felix Fietkau
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