From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v2 2/5] dts: sun8i-h3: Add APB0 related clocks and resets Date: Wed, 3 Feb 2016 13:35:34 +0100 Message-ID: <20160203123534.GG4652@lukather> References: <1454448113-18810-1-git-send-email-k@japko.eu> <1454448113-18810-3-git-send-email-k@japko.eu> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="PDbbKmIEKQ49+rCF" Return-path: Content-Disposition: inline In-Reply-To: <1454448113-18810-3-git-send-email-k-P4rZei/IPtg@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Krzysztof Adamski Cc: Linus Walleij , Chen-Yu Tsai , Rob Herring , Hans de Goede , Vishnu Patekar , Jens Kuske , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: linux-gpio@vger.kernel.org --PDbbKmIEKQ49+rCF Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Hi, On Tue, Feb 02, 2016 at 10:21:50PM +0100, Krzysztof Adamski wrote: > APB0 is bearly mentioned in H3 User Manual and it is only setup in the > Allwinners kernel dump for CIR. I have verified experimentally that the > gate for R_PIO exists and works, though. There are probably other gates > there but I don't know their order right now and I don't have access to > their peripherals on my board to test them. > > Signed-off-by: Krzysztof Adamski > --- > arch/arm/boot/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi > index 1524130e..ce35e93 100644 > --- a/arch/arm/boot/dts/sun8i-h3.dtsi > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi > @@ -276,6 +276,32 @@ > clocks = <&osc24M>, <&pll6 1>, <&pll5>; > clock-output-names = "mbus"; > }; > + > + ahb0: ahb0_clk { > + compatible = "fixed-factor-clock"; > + #clock-cells = <0>; > + clock-div = <1>; > + clock-mult = <1>; > + clocks = <&osc24M>, <&osc32k>; > + clock-output-names = "ahb0"; > + }; I'm not sure what you mean there. The fixed factor clocks only take a single parent, and you provided two. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --PDbbKmIEKQ49+rCF-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: maxime.ripard@free-electrons.com (Maxime Ripard) Date: Wed, 3 Feb 2016 13:35:34 +0100 Subject: [PATCH v2 2/5] dts: sun8i-h3: Add APB0 related clocks and resets In-Reply-To: <1454448113-18810-3-git-send-email-k@japko.eu> References: <1454448113-18810-1-git-send-email-k@japko.eu> <1454448113-18810-3-git-send-email-k@japko.eu> Message-ID: <20160203123534.GG4652@lukather> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, On Tue, Feb 02, 2016 at 10:21:50PM +0100, Krzysztof Adamski wrote: > APB0 is bearly mentioned in H3 User Manual and it is only setup in the > Allwinners kernel dump for CIR. I have verified experimentally that the > gate for R_PIO exists and works, though. There are probably other gates > there but I don't know their order right now and I don't have access to > their peripherals on my board to test them. > > Signed-off-by: Krzysztof Adamski > --- > arch/arm/boot/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi > index 1524130e..ce35e93 100644 > --- a/arch/arm/boot/dts/sun8i-h3.dtsi > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi > @@ -276,6 +276,32 @@ > clocks = <&osc24M>, <&pll6 1>, <&pll5>; > clock-output-names = "mbus"; > }; > + > + ahb0: ahb0_clk { > + compatible = "fixed-factor-clock"; > + #clock-cells = <0>; > + clock-div = <1>; > + clock-mult = <1>; > + clocks = <&osc24M>, <&osc32k>; > + clock-output-names = "ahb0"; > + }; I'm not sure what you mean there. The fixed factor clocks only take a single parent, and you provided two. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753862AbcBCMfk (ORCPT ); Wed, 3 Feb 2016 07:35:40 -0500 Received: from down.free-electrons.com ([37.187.137.238]:40549 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751048AbcBCMfi (ORCPT ); Wed, 3 Feb 2016 07:35:38 -0500 Date: Wed, 3 Feb 2016 13:35:34 +0100 From: Maxime Ripard To: Krzysztof Adamski Cc: Linus Walleij , Chen-Yu Tsai , Rob Herring , Hans de Goede , Vishnu Patekar , Jens Kuske , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH v2 2/5] dts: sun8i-h3: Add APB0 related clocks and resets Message-ID: <20160203123534.GG4652@lukather> References: <1454448113-18810-1-git-send-email-k@japko.eu> <1454448113-18810-3-git-send-email-k@japko.eu> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="PDbbKmIEKQ49+rCF" Content-Disposition: inline In-Reply-To: <1454448113-18810-3-git-send-email-k@japko.eu> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --PDbbKmIEKQ49+rCF Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Tue, Feb 02, 2016 at 10:21:50PM +0100, Krzysztof Adamski wrote: > APB0 is bearly mentioned in H3 User Manual and it is only setup in the > Allwinners kernel dump for CIR. I have verified experimentally that the > gate for R_PIO exists and works, though. There are probably other gates > there but I don't know their order right now and I don't have access to > their peripherals on my board to test them. >=20 > Signed-off-by: Krzysztof Adamski > --- > arch/arm/boot/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) >=20 > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3= =2Edtsi > index 1524130e..ce35e93 100644 > --- a/arch/arm/boot/dts/sun8i-h3.dtsi > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi > @@ -276,6 +276,32 @@ > clocks =3D <&osc24M>, <&pll6 1>, <&pll5>; > clock-output-names =3D "mbus"; > }; > + > + ahb0: ahb0_clk { > + compatible =3D "fixed-factor-clock"; > + #clock-cells =3D <0>; > + clock-div =3D <1>; > + clock-mult =3D <1>; > + clocks =3D <&osc24M>, <&osc32k>; > + clock-output-names =3D "ahb0"; > + }; I'm not sure what you mean there. The fixed factor clocks only take a single parent, and you provided two. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --PDbbKmIEKQ49+rCF Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWsfQWAAoJEBx+YmzsjxAgB6UP/1lsVC3vhfE+6Ey5rCTLxrFS CV8OFodpAWujwqkoLkHD1VT4FF4n0Q0Q1+X8aErmWRhxhiJ1oiV7EjROzeS22BDA QyviyapvhQMR2ViXRxKXvvrkXEwn6K4AH5A51P0IP607sruRyGhsouogbS9jlgtC tbO+69xZkBuYVSzQfoVWH6ynCV7zFH7PcVvKsH+seIJ8MuRVNsOz4pdXIT1ghcvD VqNaUoWDZLVw+O/CxNVZT2iLw7eMiZmmVSHZWuw0WtvztbKKc10ED+yPNJvErzGk Cbqphp5BputwMnVOkN7w8799g1+oOU0Sec3jq8+toWdu60NjbX4wxh0tXGYFK3co EYcH11i0+z45MAFhwpL2R16wc2yYBjebWC5FTc41+CUzaQkD26l0AHfZN5QAujk5 jg8S3O1sFtWNo+WAjrhmNkpIVHHDNjamOaagEI6wK+jkZ0+Jn/WtARJGkAA1TDGU OQrXAMvgJtHC0MQ6LFsf4j5n9qY1ZrudzbIrUxdBrjK7CN7aoIqHwQW5uKpjPNie uKbfr4wDtB/2xCwq7D9hKYIDehNsHt1BoFl/kChq3gkk0q6tZIcScqXuzzHWBZh2 sxHp+19k1VIBMmqV0VMIChBQllnZjwIYQw+Pm6/GkG219saEEQagJci3gaXjTx5f yyrkyIKzzEuXbhFvFZ5X =LgSi -----END PGP SIGNATURE----- --PDbbKmIEKQ49+rCF--