From: Jason Cooper <jason@lakedaemon.net>
To: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 07/15] irqchip: mips-gic: Use HW IDs for VPE_OTHER_ADDR
Date: Thu, 18 Feb 2016 01:47:40 +0000 [thread overview]
Message-ID: <20160218014740.GP5183@io.lakedaemon.net> (raw)
In-Reply-To: <1454469335-14778-8-git-send-email-paul.burton@imgtec.com>
On Wed, Feb 03, 2016 at 03:15:27AM +0000, Paul Burton wrote:
> The Linux CPU number doesn't necessarily match up with the ID used for a
> VP by hardware. Convert the CPU number to the HW ID using mips_cm_vp_id
> when writing to the VP(E)_OTHER_ADDR register in order to ensure that we
> correctly access registers for the VPs of secondary cores. This most
> notably affects systems using CM3, such as those based around I6400.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> ---
>
> drivers/irqchip/irq-mips-gic.c | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
Note: standard subject line for irqchip is 'irqchip/mips-gic: [A-Z]...'
with that small change,
Acked-by: Jason Cooper <jason@lakedaemon.net>
thx,
Jason.
next prev parent reply other threads:[~2016-02-18 1:47 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-03 3:15 [PATCH 00/15] Support for MIPSr6 Virtual Processors (multi-threading) Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 01/15] MIPS: Detect MIPSr6 Virtual Processor support Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 02/15] MIPS: traps: Make sure secondary cores have a sane ebase register Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 03/15] MIPS: pm-cps: Avoid offset overflow on MIPSr6 Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 14:48 ` James Hogan
2016-02-03 14:48 ` James Hogan
2016-02-03 3:15 ` [PATCH 04/15] MIPS: CPC: Add start, stop and running CM3 CPC registers Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 05/15] MIPS: CM: Add CM GCR_BEV_BASE accessors Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 14:58 ` James Hogan
2016-02-03 14:58 ` James Hogan
2016-02-03 15:46 ` Paul Burton
2016-02-03 15:46 ` Paul Burton
2016-02-03 16:15 ` James Hogan
2016-02-03 16:15 ` James Hogan
2016-02-03 3:15 ` [PATCH 07/15] irqchip: mips-gic: Use HW IDs for VPE_OTHER_ADDR Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-18 1:47 ` Jason Cooper [this message]
2016-02-03 3:15 ` [PATCH 08/15] irqchip: mips-gic: Provide VP ID accessor Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-18 1:48 ` Jason Cooper
2016-02-03 3:15 ` [PATCH 09/15] MIPS: smp-cps: Ensure our VP ident calculation is correct Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 10/15] MIPS: smp-cps: Pull cache init into a function Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 11/15] MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpes Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 12/15] MIPS: smp-cps: Skip core setup if coherent Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 13/15] MIPS: smp-cps: Support MIPSr6 Virtual Processors Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-03 3:15 ` [PATCH 14/15] MIPS: smp-cps: Add nothreads kernel parameter Paul Burton
2016-02-03 3:15 ` Paul Burton
2016-02-18 2:40 ` Florian Fainelli
2016-02-03 3:15 ` [PATCH 15/15] MIPS: smp-cps: Stop printing EJTAG exceptions to UART Paul Burton
2016-02-03 3:15 ` Paul Burton
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