From: Peter Zijlstra <peterz@infradead.org>
To: Jiri Olsa <jolsa@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
Ingo Molnar <mingo@kernel.org>, Andi Kleen <andi@firstfloor.org>,
Stephane Eranian <eranian@google.com>,
Wang Nan <wangnan0@huawei.com>,
zheng.z.yan@intel.com, Kan Liang <kan.liang@intel.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [BUG] Core2 cpu triggers hard lockup with perf test
Date: Sat, 27 Feb 2016 15:48:09 +0100 [thread overview]
Message-ID: <20160227144809.GC6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <20160227123636.GB30858@krava.redhat.com>
On Sat, Feb 27, 2016 at 01:37:01PM +0100, Jiri Olsa wrote:
> we are getting hard lockups on Core2 cpus (model 23)
> I can't find what's special about Core2 CPU PEBS setup,
> it seems that oher CPUs are ok (tried on ivb/snb/hsw).
>
> reverting the 156174999dd1 fixed the issue for me
>
> ideas? thanks,
The obvious difference between Core2 and later chips is that Core2 only
has PEBS on a single counter (cnt0).
I'll try and have a closer look on Monday, I should still have a Core2
class machine around the house somewhere.
next prev parent reply other threads:[~2016-02-27 14:48 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-27 12:37 [BUG] Core2 cpu triggers hard lockup with perf test Jiri Olsa
2016-02-27 14:48 ` Peter Zijlstra [this message]
2016-02-27 15:46 ` Andi Kleen
2016-02-29 22:12 ` Liang, Kan
2016-03-01 6:55 ` Jiri Olsa
2016-03-01 9:17 ` Peter Zijlstra
2016-03-01 11:06 ` Jiri Olsa
2016-03-01 11:20 ` Peter Zijlstra
2016-03-01 14:51 ` Andi Kleen
2016-03-01 14:59 ` Peter Zijlstra
2016-03-01 17:17 ` Jiri Olsa
2016-03-01 17:32 ` Andi Kleen
2016-03-01 17:49 ` Peter Zijlstra
2016-03-01 18:04 ` Jiri Olsa
2016-03-01 18:14 ` Peter Zijlstra
2016-03-01 18:12 ` Peter Zijlstra
2016-03-01 19:03 ` [PATCH] perf x86: Use PAGE_SIZE for PEBS buffer size on Core2 Jiri Olsa
2016-03-08 13:15 ` [tip:perf/core] perf/x86/intel: " tip-bot for Jiri Olsa
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