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diff for duplicates of <20160229230146.GT13417@atomide.com>

diff --git a/a/1.txt b/N1/1.txt
index f913e8f..b5875e2 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-* Lokesh Vutla <lokeshvutla-l0cyMroinI0@public.gmane.org> [160224 02:14]:
+* Lokesh Vutla <lokeshvutla@ti.com> [160224 02:14]:
 > DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
 > represent this in memory dt node, the address-cells and size cells
 > should be 2. So, changing the address-cells and size-cells to 2 and
@@ -7,7 +7,3 @@
 Applying into omap-for-v4.6/dt thanks.
 
 Tony
---
-To unsubscribe from this list: send the line "unsubscribe devicetree" in
-the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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diff --git a/a/content_digest b/N1/content_digest
index 2429113..1661d1b 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,22 +1,11 @@
  "ref\01456308664-28308-1-git-send-email-lokeshvutla@ti.com\0"
- "ref\01456308664-28308-1-git-send-email-lokeshvutla-l0cyMroinI0@public.gmane.org\0"
- "From\0Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>\0"
- "Subject\0Re: [PATCH] ARM: dts: DRA7: change address-cells and size-cells\0"
+ "From\0tony@atomide.com (Tony Lindgren)\0"
+ "Subject\0[PATCH] ARM: dts: DRA7: change address-cells and size-cells\0"
  "Date\0Mon, 29 Feb 2016 15:01:46 -0800\0"
- "To\0Lokesh Vutla <lokeshvutla-l0cyMroinI0@public.gmane.org>\0"
- "Cc\0linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
-  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  mark.rutland-5wv7dgnIgG8@public.gmane.org
-  pawel.moll-5wv7dgnIgG8@public.gmane.org
-  galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  Tero Kristo <t-kristo-l0cyMroinI0@public.gmane.org>
-  nm-l0cyMroinI0@public.gmane.org
- " Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "* Lokesh Vutla <lokeshvutla-l0cyMroinI0@public.gmane.org> [160224 02:14]:\n"
+ "* Lokesh Vutla <lokeshvutla@ti.com> [160224 02:14]:\n"
  "> DRA7 SoC has the capability to support DDR memory upto 4GB. In order to\n"
  "> represent this in memory dt node, the address-cells and size cells\n"
  "> should be 2. So, changing the address-cells and size-cells to 2 and\n"
@@ -24,10 +13,6 @@
  "\n"
  "Applying into omap-for-v4.6/dt thanks.\n"
  "\n"
- "Tony\n"
- "--\n"
- "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
- "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
- More majordomo info at  http://vger.kernel.org/majordomo-info.html
+ Tony
 
-1e4e2e421aafd0614b99bffbc4ce7024250c0d6b20ced8450c0fc44adba8ab81
+4b77f8de4d3b60d51c26da7b8e644592fb8535ca9096feb59ce9bc7876e1b63e

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