All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ralf Baechle <ralf@linux-mips.org>
To: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>,
	"Steven J . Hill" <Steven.Hill@imgtec.com>,
	linux-mips@linux-mips.org, Fuxin Zhang <zhangfx@lemote.com>,
	Zhangjin Wu <wuzhangjin@gmail.com>
Subject: Re: [PATCH V4 3/5] MIPS: Loongson: Invalidate special TLBs when needed
Date: Wed, 2 Mar 2016 11:41:29 +0100	[thread overview]
Message-ID: <20160302104128.GA18341@linux-mips.org> (raw)
In-Reply-To: <1456567658-14694-4-git-send-email-chenhc@lemote.com>

On Sat, Feb 27, 2016 at 06:07:36PM +0800, Huacai Chen wrote:

> Loongson-2 has a 4 entry itlb which is a subset of jtlb, Loongson-3 has
> a 4 entry itlb and a 4 entry dtlb which are subsets of jtlb. We should
> write diag register to invalidate itlb/dtlb when flushing jtlb because
> itlb/dtlb are not totally transparent to software.
> 
> For Loongson-3A R2 (and newer), we should invalidate ITLB, DTLB, VTLB
> and FTLB before we enable/disable FTLB.
> 
> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
>  arch/mips/kernel/cpu-probe.c |  2 ++
>  arch/mips/mm/tlb-r4k.c       | 27 +++++++++++++++------------
>  2 files changed, 17 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index 2a2ae86..ef605e2 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -562,6 +562,8 @@ static int set_ftlb_enable(struct cpuinfo_mips *c, int enable)
>  					   << MIPS_CONF7_FTLBP_SHIFT));
>  		break;
>  	case CPU_LOONGSON3:
> +		/* Flush ITLB, DTLB, VTLB and FTLB */
> +		write_c0_diag(1<<2 | 1<<3 | 1<<12 | 1<<13);

Too many magic numbers.  Could you use defines for the magic numbers you're
writing to these registers?

>  		/* Loongson-3 cores use Config6 to enable the FTLB */
>  		config = read_c0_config6();
>  		if (enable)
> diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
> index c17d762..7593529 100644
> --- a/arch/mips/mm/tlb-r4k.c
> +++ b/arch/mips/mm/tlb-r4k.c
> @@ -28,25 +28,28 @@
>  extern void build_tlb_refill_handler(void);
>  
>  /*
> - * LOONGSON2/3 has a 4 entry itlb which is a subset of dtlb,
> - * unfortunately, itlb is not totally transparent to software.
> + * LOONGSON-2 has a 4 entry itlb which is a subset of jtlb, LOONGSON-3 has
> + * a 4 entry itlb and a 4 entry dtlb which are subsets of jtlb. Unfortunately,
> + * itlb/dtlb are not totally transparent to software.
>   */
> -static inline void flush_itlb(void)
> +static inline void flush_spec_tlb(void)
>  {
>  	switch (current_cpu_type()) {
>  	case CPU_LOONGSON2:
> +		write_c0_diag(0x4);

Same here.

> +		break;
>  	case CPU_LOONGSON3:
> -		write_c0_diag(4);
> +		write_c0_diag(0xc);

And here.

Also, why did the magic number change from 4 to 0xc?

>  		break;
>  	default:
>  		break;
>  	}
>  }
>  
> -static inline void flush_itlb_vm(struct vm_area_struct *vma)
> +static inline void flush_spec_tlb_vm(struct vm_area_struct *vma)
>  {
>  	if (vma->vm_flags & VM_EXEC)
> -		flush_itlb();
> +		flush_spec_tlb();

Hm..  "spec tlb" is not very descriptive in my opinion.  How about
renameing this function to flush_micro_tlb().

  Ralf

  reply	other threads:[~2016-03-02 10:41 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-27 10:07 [PATCH V4 0/5] MIPS: Loongson: Add Loongson-3A R2 support Huacai Chen
2016-02-27 10:07 ` [PATCH V4 1/5] MIPS: Loongson: Add Loongson-3A R2 basic support Huacai Chen
2016-02-27 10:07 ` [PATCH V4 2/5] MIPS: Loongson-3: Set cache flush handlers to cache_noop Huacai Chen
2016-02-27 10:07 ` [PATCH V4 3/5] MIPS: Loongson: Invalidate special TLBs when needed Huacai Chen
2016-03-02 10:41   ` Ralf Baechle [this message]
2016-03-02 10:51     ` Huacai Chen
2016-02-27 10:07 ` [PATCH V4 4/5] MIPS: Loongson-3: Fast TLB refill handler Huacai Chen
2016-02-27 10:07 ` [PATCH V4 5/5] MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENT Huacai Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160302104128.GA18341@linux-mips.org \
    --to=ralf@linux-mips.org \
    --cc=Steven.Hill@imgtec.com \
    --cc=aurelien@aurel32.net \
    --cc=chenhc@lemote.com \
    --cc=linux-mips@linux-mips.org \
    --cc=wuzhangjin@gmail.com \
    --cc=zhangfx@lemote.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.