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diff for duplicates of <20160307112418.GA11152@ulmo.nvidia.com>

diff --git a/a/1.txt b/N1/1.txt
index 41caef5..db355ee 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,11 +1,11 @@
 On Fri, Mar 04, 2016 at 10:31:45PM -0600, Rob Herring wrote:
 > On Fri, Mar 04, 2016 at 05:19:31PM +0100, Thierry Reding wrote:
-> > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+> > From: Thierry Reding <treding@nvidia.com>
 > > 
 > > The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a
 > > set of lanes that are used for PCIe, SATA and USB.
 > > 
-> > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+> > Signed-off-by: Thierry Reding <treding@nvidia.com>
 > > ---
 > > Changes in v10:
 > > - clarify that the hardware documentation means something different when
@@ -24,7 +24,7 @@ On Fri, Mar 04, 2016 at 10:31:45PM -0600, Rob Herring wrote:
 > 
 > Without really understanding the h/w here, looks okay to me.
 > 
-> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+> Acked-by: Rob Herring <robh@kernel.org>
 > 
 > > +SoC include:
 > > +
diff --git a/a/content_digest b/N1/content_digest
index 4887b4c..982e6ec 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,32 +1,32 @@
  "ref\01457108379-20794-1-git-send-email-thierry.reding@gmail.com\0"
  "ref\020160305043145.GL13525@rob-hp-laptop\0"
- "From\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
+ "From\0Thierry Reding <thierry.reding@gmail.com>\0"
  "Subject\0Re: [PATCH v10 1/9] dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding\0"
  "Date\0Mon, 7 Mar 2016 12:24:18 +0100\0"
- "To\0Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0"
- "Cc\0Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>"
-  Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
-  Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
-  Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
-  Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
-  linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
-  Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
-  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
- " Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\0"
+ "To\0Rob Herring <robh@kernel.org>\0"
+ "Cc\0Kishon Vijay Abraham I <kishon@ti.com>"
+  Linus Walleij <linus.walleij@linaro.org>
+  Stephen Warren <swarren@wwwdotorg.org>
+  Alexandre Courbot <gnurou@gmail.com>
+  Andrew Bresticker <abrestic@chromium.org>
+  linux-tegra@vger.kernel.org
+  devicetree@vger.kernel.org
+  linux-usb@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  Pawel Moll <pawel.moll@arm.com>
+  Mark Rutland <mark.rutland@arm.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+ " Kumar Gala <galak@codeaurora.org>\0"
  "\01:1\0"
  "b\0"
  "On Fri, Mar 04, 2016 at 10:31:45PM -0600, Rob Herring wrote:\n"
  "> On Fri, Mar 04, 2016 at 05:19:31PM +0100, Thierry Reding wrote:\n"
- "> > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ "> > From: Thierry Reding <treding@nvidia.com>\n"
  "> > \n"
  "> > The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a\n"
  "> > set of lanes that are used for PCIe, SATA and USB.\n"
  "> > \n"
- "> > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ "> > Signed-off-by: Thierry Reding <treding@nvidia.com>\n"
  "> > ---\n"
  "> > Changes in v10:\n"
  "> > - clarify that the hardware documentation means something different when\n"
@@ -45,7 +45,7 @@
  "> \n"
  "> Without really understanding the h/w here, looks okay to me.\n"
  "> \n"
- "> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n"
+ "> Acked-by: Rob Herring <robh@kernel.org>\n"
  "> \n"
  "> > +SoC include:\n"
  "> > +\n"
@@ -85,4 +85,4 @@
  "=D435\n"
  "-----END PGP SIGNATURE-----\n"
 
-9a266a9f434a225276db03f6e3203fa4e8df032c2f8d246de9a13d7e99226fa8
+0bc65daf0c5f2218e60395bad700775a698097964bc8b85779fd8ee0d41c3dea

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