From: Mika Westerberg <mika.westerberg@intel.com>
To: Qipeng Zha <qipeng.zha@intel.com>
Cc: linux-gpio@vger.kernel.org, linus.walleij@linaro.org,
Qi Zheng <qi.zheng@intel.com>
Subject: Re: [PATCH 3/3] pinctrl:Intel: make the high level interrupt working
Date: Fri, 11 Mar 2016 11:49:42 +0200 [thread overview]
Message-ID: <20160311094942.GP1796@lahna.fi.intel.com> (raw)
In-Reply-To: <1457715962-108484-3-git-send-email-qipeng.zha@intel.com>
On Sat, Mar 12, 2016 at 01:06:02AM +0800, Qipeng Zha wrote:
> High level trigger mode of GPIO interrupt is not set correctly
> in intel_gpio_irq_type(), and will make this kind of interrupt
> not respond.
Good finding.
> Signed-off-by: Qi Zheng <qi.zheng@intel.com>
> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
> ---
> drivers/pinctrl/intel/pinctrl-intel.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
> index d6fe659..706a21f 100644
> --- a/drivers/pinctrl/intel/pinctrl-intel.c
> +++ b/drivers/pinctrl/intel/pinctrl-intel.c
> @@ -790,6 +790,8 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned type)
> value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
> } else if (type & IRQ_TYPE_LEVEL_LOW) {
> value |= PADCFG0_RXINV;
> + } else if (type & IRQ_TYPE_LEVEL_HIGH) {
> + ;
What about following instead?
} else if (type & IRQ_TYPE_LEVEL_MASK) {
if (type & IRQ_TYPE_LEVEL_LOW)
value |= PADCFG0_RXINV;
}
> } else {
> value |= PADCFG0_RXEVCFG_DISABLED << PADCFG0_RXEVCFG_SHIFT;
> }
> --
> 1.8.3.2
next prev parent reply other threads:[~2016-03-11 9:49 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-11 17:06 [PATCH 1/3] pinctrl: Intel: add RX invertion config Qipeng Zha
2016-03-11 9:38 ` Mika Westerberg
2016-03-14 1:10 ` Zheng, Qi
2016-03-14 8:50 ` Westerberg, Mika
2016-03-14 8:56 ` Zheng, Qi
2016-03-14 12:26 ` Linus Walleij
2016-03-15 2:17 ` Zheng, Qi
2016-03-16 12:27 ` Linus Walleij
2016-03-16 13:34 ` Daniel Vetter
[not found] ` <20160316133412.GN14170-dv86pmgwkMBes7Z6vYuT8azUEOm+Xw19@public.gmane.org>
2016-03-17 14:41 ` Linus Walleij
2016-03-17 15:14 ` [Intel-gfx] " Jani Nikula
2016-03-11 17:06 ` [PATCH 2/3] pinctrl:Intel: clear interrupt status for every IRQ setup Qipeng Zha
2016-03-11 9:45 ` Mika Westerberg
2016-03-14 1:24 ` Zheng, Qi
2016-03-14 8:44 ` Westerberg, Mika
2016-03-14 9:02 ` Zheng, Qi
2016-03-14 9:20 ` Westerberg, Mika
2016-03-14 12:40 ` Linus Walleij
2016-03-14 12:54 ` Westerberg, Mika
2016-03-14 13:00 ` Westerberg, Mika
2016-03-14 14:26 ` Westerberg, Mika
2016-03-15 5:17 ` Zheng, Qi
2016-03-11 17:06 ` [PATCH 3/3] pinctrl:Intel: make the high level interrupt working Qipeng Zha
2016-03-11 9:49 ` Mika Westerberg [this message]
2016-03-14 1:26 ` Zheng, Qi
2016-03-14 1:40 ` Zheng, Qi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160311094942.GP1796@lahna.fi.intel.com \
--to=mika.westerberg@intel.com \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=qi.zheng@intel.com \
--cc=qipeng.zha@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.