From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@fr.ibm.com>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Thomas Huth <thuth@redhat.com>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [RFC PATCH 2/2] target-ppc: fix interrupt vectors address migration
Date: Tue, 22 Mar 2016 11:19:28 +1100 [thread overview]
Message-ID: <20160322001928.GP23586@voom.redhat.com> (raw)
In-Reply-To: <1458568928-3055-3-git-send-email-clg@fr.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 3098 bytes --]
On Mon, Mar 21, 2016 at 03:02:08PM +0100, Cédric Le Goater wrote:
> commit 2360b6e84f78 ("target-ppc: force update of msr bits in
> cpu_post_load") introduced a change to restore env->excp_prefix of a
> guest which could have altered its MSR_EP. To do this, cpu_post_load()
> invalidates msr and then calls ppc_store_msr() with the expected value
> in argument.
>
> The problem is that ppc_store_msr() relies on a 'valid' current msr
> before changing its value. The MSR_HVB and MSR_TGPR bits are excluded
> from the msr reset to keep the checks valid but the MSR_IR, MSR_DR,
> MSR_EP bits which are also used through the msr_{ir,dr,ep} macros, are
> reseted.
>
> This is an issue for CPUs not using MSR_EP, on the spapr platform for
> instance but all book3s are impacted. If excp_prefix is restored to
> some value, it will be reseted by this call, causing an ISEG exception
> on spapr guests.
>
> This patch proposal is to test the msr_mask before actually testing
> the MSR_EP bit and protect excp_prefix.
>
> Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
> ---
>
> Should we just move the test in cpu_post_load() and not reset MSR_EP
> if it is not present in msr_mask ? like this is done for MSR_HVB and
> MSR_TGPR. I think this is making assumptions on what ppc_store_msr()
> is up to though.
>
> Maybe we could add a POWERPC_FLAGS_ for this purpose ? or test the
> excp_model ?
>
> There is room for improvement in ppc_store_msr(). It might need a new
> helper like ppc_restore_msr() ?
>
> Suggestions welcomed.
So, IIUC, in spapr MSR[EP] can't be set with mtmsr or rfid, but can be
set with H_SET_MODE?
I think what we need to do is to make sure the full MSR value is
migrated then, even if EP is not in the msr_mask. Once that's done,
we should be able to correctly calculate excp_prefix from the MSR
value after migration.
Or am I missing something?
> target-ppc/helper_regs.h | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
> index 271fddf17f0a..2a72e000ed83 100644
> --- a/target-ppc/helper_regs.h
> +++ b/target-ppc/helper_regs.h
> @@ -92,9 +92,11 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
> /* Swap temporary saved registers with GPRs */
> hreg_swap_gpr_tgpr(env);
> }
> - if (unlikely((value >> MSR_EP) & 1) != msr_ep) {
> - /* Change the exception prefix on PowerPC 601 */
> - env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000;
> + if ((env->msr_mask >> MSR_EP) & 1) {
> + if (unlikely((value >> MSR_EP) & 1) != msr_ep) {
> + /* Change the exception prefix on PowerPC 601 */
> + env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000;
> + }
> }
> #endif
> env->msr = value;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
prev parent reply other threads:[~2016-03-22 0:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-21 14:02 [Qemu-devel] [RFC PATCH 0/2] ppc: fix spapr migration (TCG) Cédric Le Goater
2016-03-21 14:02 ` [Qemu-devel] [RFC PATCH 1/2] target-ppc: migrate interrupt vectors address for spapr VM Cédric Le Goater
2016-03-21 16:18 ` Thomas Huth
2016-03-21 16:45 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2016-03-21 16:51 ` [Qemu-devel] " Cédric Le Goater
2016-03-21 17:04 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2016-03-22 0:15 ` [Qemu-devel] " David Gibson
2016-03-22 7:13 ` Cédric Le Goater
2016-03-21 14:02 ` [Qemu-devel] [RFC PATCH 2/2] target-ppc: fix interrupt vectors address migration Cédric Le Goater
2016-03-22 0:19 ` David Gibson [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160322001928.GP23586@voom.redhat.com \
--to=david@gibson.dropbear.id.au \
--cc=agraf@suse.de \
--cc=clg@fr.ibm.com \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=thuth@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.