diff for duplicates of <20160404140348.GE402@leoy-linaro> diff --git a/a/1.txt b/N1/1.txt index 4e61dde..fab780c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On Mon, Apr 04, 2016 at 03:53:47PM +0200, Linus Walleij wrote: -> On Mon, Apr 4, 2016 at 3:42 PM, Leo Yan <leo.yan@linaro.org> wrote: +> On Mon, Apr 4, 2016 at 3:42 PM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote: > > On Mon, Apr 04, 2016 at 01:21:00PM +0200, Linus Walleij wrote: [...] @@ -8,7 +8,7 @@ On Mon, Apr 04, 2016 at 03:53:47PM +0200, Linus Walleij wrote: > > enabling bits. This is the reason before I only registered one clock. > > So according to you and Rob's comments, how about change as below? > > -> > dual_timer0: timer at f8008000 { +> > dual_timer0: timer@f8008000 { > > compatible = "arm,sp804", "arm,primecell"; > > reg = <0x0 0xf8008000 0x0 0x1000>; > > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, @@ -25,3 +25,7 @@ Will fix to "timer1" and "timer2" and sent out new patch. Thanks, Leo Yan +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index ad3ca72..977a69d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -5,14 +5,25 @@ "ref\0CACRpkdZ=_86Rhc+ei+3uE0dda9+onC8pQwosheMfEj4tOqmcDA@mail.gmail.com\0" "ref\020160404134237.GC402@leoy-linaro\0" "ref\0CACRpkdb_aMpj3X-m-FdM-PCCSuXgHnect5+nWPFnGVzGx4zrbA@mail.gmail.com\0" - "From\0leo.yan@linaro.org (Leo Yan)\0" - "Subject\0[PATCH v2 02/16] arm64: dts: add sp804 timer node for Hi6220\0" + "ref\0CACRpkdb_aMpj3X-m-FdM-PCCSuXgHnect5+nWPFnGVzGx4zrbA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" + "From\0Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Subject\0Re: [PATCH v2 02/16] arm64: dts: add sp804 timer node for Hi6220\0" "Date\0Mon, 4 Apr 2016 22:03:48 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Cc\0Guodong Xu <guodong.xu-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" + Xu Wei <xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> + Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> + Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> + Arnd Bergmann <arnd.bergmann-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> + " XinWei Kong <kong.kongxinwei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\0" "\00:1\0" "b\0" "On Mon, Apr 04, 2016 at 03:53:47PM +0200, Linus Walleij wrote:\n" - "> On Mon, Apr 4, 2016 at 3:42 PM, Leo Yan <leo.yan@linaro.org> wrote:\n" + "> On Mon, Apr 4, 2016 at 3:42 PM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:\n" "> > On Mon, Apr 04, 2016 at 01:21:00PM +0200, Linus Walleij wrote:\n" "\n" "[...]\n" @@ -21,7 +32,7 @@ "> > enabling bits. This is the reason before I only registered one clock.\n" "> > So according to you and Rob's comments, how about change as below?\n" "> >\n" - "> > dual_timer0: timer at f8008000 {\n" + "> > dual_timer0: timer@f8008000 {\n" "> > compatible = \"arm,sp804\", \"arm,primecell\";\n" "> > reg = <0x0 0xf8008000 0x0 0x1000>;\n" "> > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -37,6 +48,10 @@ "Will fix to \"timer1\" and \"timer2\" and sent out new patch.\n" "\n" "Thanks,\n" - Leo Yan + "Leo Yan\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -c8e31bf2fd76012b63c299fe7ca2439f15de8743deb1a8fa01ba0fd9c6fb59e2 +d31115848b69e7acd4783d05a964382599ef4a00cd054ede11501079c956e2a2
diff --git a/a/1.txt b/N2/1.txt index 4e61dde..333ea18 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -8,7 +8,7 @@ On Mon, Apr 04, 2016 at 03:53:47PM +0200, Linus Walleij wrote: > > enabling bits. This is the reason before I only registered one clock. > > So according to you and Rob's comments, how about change as below? > > -> > dual_timer0: timer at f8008000 { +> > dual_timer0: timer@f8008000 { > > compatible = "arm,sp804", "arm,primecell"; > > reg = <0x0 0xf8008000 0x0 0x1000>; > > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, diff --git a/a/content_digest b/N2/content_digest index ad3ca72..282fc65 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -5,10 +5,20 @@ "ref\0CACRpkdZ=_86Rhc+ei+3uE0dda9+onC8pQwosheMfEj4tOqmcDA@mail.gmail.com\0" "ref\020160404134237.GC402@leoy-linaro\0" "ref\0CACRpkdb_aMpj3X-m-FdM-PCCSuXgHnect5+nWPFnGVzGx4zrbA@mail.gmail.com\0" - "From\0leo.yan@linaro.org (Leo Yan)\0" - "Subject\0[PATCH v2 02/16] arm64: dts: add sp804 timer node for Hi6220\0" + "From\0Leo Yan <leo.yan@linaro.org>\0" + "Subject\0Re: [PATCH v2 02/16] arm64: dts: add sp804 timer node for Hi6220\0" "Date\0Mon, 4 Apr 2016 22:03:48 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Linus Walleij <linus.walleij@linaro.org>\0" + "Cc\0Guodong Xu <guodong.xu@linaro.org>" + Xu Wei <xuwei5@hisilicon.com> + Mark Rutland <mark.rutland@arm.com> + Rob Herring <robh@kernel.org> + Grant Likely <grant.likely@secretlab.ca> + Arnd Bergmann <arnd.bergmann@linaro.org> + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + " XinWei Kong <kong.kongxinwei@hisilicon.com>\0" "\00:1\0" "b\0" "On Mon, Apr 04, 2016 at 03:53:47PM +0200, Linus Walleij wrote:\n" @@ -21,7 +31,7 @@ "> > enabling bits. This is the reason before I only registered one clock.\n" "> > So according to you and Rob's comments, how about change as below?\n" "> >\n" - "> > dual_timer0: timer at f8008000 {\n" + "> > dual_timer0: timer@f8008000 {\n" "> > compatible = \"arm,sp804\", \"arm,primecell\";\n" "> > reg = <0x0 0xf8008000 0x0 0x1000>;\n" "> > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -39,4 +49,4 @@ "Thanks,\n" Leo Yan -c8e31bf2fd76012b63c299fe7ca2439f15de8743deb1a8fa01ba0fd9c6fb59e2 +625b4b2bfcd0e66aee720ec5836c8b8726872ea4a052c81f9ca76ee217328f86
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