diff for duplicates of <20160413162345.GC30129@ulmo.ba.sec> diff --git a/a/1.txt b/N1/1.txt index e3ac67d..a9209f7 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ On Mon, Apr 11, 2016 at 11:38:49AM -0600, Stephen Warren wrote: > On 04/08/2016 10:13 AM, Thierry Reding wrote: -> > From: Thierry Reding <treding@nvidia.com> +> > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > > > > Changes to the pad controller device tree binding have required that > > each lane be associated with a separate PHY. Update the PCI host bridge diff --git a/a/content_digest b/N1/content_digest index 81caf1f..1b62392 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,19 +1,20 @@ "ref\01460131994-24493-1-git-send-email-thierry.reding@gmail.com\0" "ref\0570BE129.40907@wwwdotorg.org\0" - "From\0Thierry Reding <thierry.reding@gmail.com>\0" + "ref\0570BE129.40907-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org\0" + "From\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" "Subject\0Re: [PATCH v4 1/2] dt-bindings: pci: tegra: Update for per-lane PHYs\0" "Date\0Wed, 13 Apr 2016 18:23:45 +0200\0" - "To\0Stephen Warren <swarren@wwwdotorg.org>\0" - "Cc\0Bjorn Helgaas <bhelgaas@google.com>" - Alexandre Courbot <gnurou@gmail.com> - linux-tegra@vger.kernel.org - linux-pci@vger.kernel.org - " devicetree@vger.kernel.org\0" + "To\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0" + "Cc\0Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>" + Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" "\01:1\0" "b\0" "On Mon, Apr 11, 2016 at 11:38:49AM -0600, Stephen Warren wrote:\n" "> On 04/08/2016 10:13 AM, Thierry Reding wrote:\n" - "> > From: Thierry Reding <treding@nvidia.com>\n" + "> > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" "> > \n" "> > Changes to the pad controller device tree binding have required that\n" "> > each lane be associated with a separate PHY. Update the PCI host bridge\n" @@ -54,4 +55,4 @@ "=f4aV\n" "-----END PGP SIGNATURE-----\n" -b2128c72e5b6f4a70c8b075fb77d686fe410ce10fcef502d426031d0c35c877c +ac46acd2d9524d61d7a1106d55e2cadad0aa5ae5c125dafead1a1dc5530f2b26
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