From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqZmH-0003fk-4F for qemu-devel@nongnu.org; Thu, 14 Apr 2016 01:25:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aqZmC-00051g-45 for qemu-devel@nongnu.org; Thu, 14 Apr 2016 01:25:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56039) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqZmB-00051a-Sw for qemu-devel@nongnu.org; Thu, 14 Apr 2016 01:25:12 -0400 Date: Thu, 14 Apr 2016 13:25:02 +0800 From: Peter Xu Message-ID: <20160414052502.GC25961@pxdev.xzpeter.org> References: <1460366363-4589-1-git-send-email-peterx@redhat.com> <20160411152911-mutt-send-email-mst@redhat.com> <20160413072737.GE17558@pxdev.xzpeter.org> <570E5A39.2010603@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <570E5A39.2010603@web.de> Subject: Re: [Qemu-devel] [PATCH v2 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: "Michael S. Tsirkin" , qemu-devel@nongnu.org, imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, pbonzini@redhat.com, rkrcmar@redhat.com On Wed, Apr 13, 2016 at 07:39:53AM -0700, Jan Kiszka wrote: > On 2016-04-13 00:27, Peter Xu wrote: > > On Mon, Apr 11, 2016 at 03:32:18PM +0300, Michael S. Tsirkin wrote: > >> On Mon, Apr 11, 2016 at 05:19:10PM +0800, Peter Xu wrote: > >>> v2 changes: > >>> - patch 1 > >>> - rename "int_remap" to "intr" in several places [Marcel] > >>> - remove "Intel" specific words in desc or commit message, prepare > >>> itself with further AMD support [Marcel] > >>> - avoid using object_property_get_bool() [Marcel] > >>> - patch 5 > >>> - use PCI bus number 0xff rather than 0xf0 for the IOAPIC scope > >>> definition. (please let me know if anyone knows how I can avoid > >>> user using PCI bus number 0xff... TIA) > >>> - patch 11 > >>> - fix comments [Marcel] > >>> - all > >>> - remove intr_supported variable [Marcel] > >>> > >>> This patchset provide very basic functionalities for interrupt > >>> remapping (IR) support of the emulated Intel IOMMU device. > >>> > >>> By default, IR is disabled to be better compatible with current > >>> QEMU. To enable IR, we can using the following command to boot a > >>> IR-supported VM with basic network (still do not support kvm-ioapic, > >>> so we need to specify kernel-irqchip=off here): > >>> > >>> $ qemu-system-x86_64 -M q35,iommu=on,intr=on,kernel-irqchip=off \ > >>> -enable-kvm -m 1024 -s \ > >>> -monitor telnet::3333,server,nowait \ > >>> -netdev user,id=user.0,hostfwd=tcp::5555-:22 \ > >>> -device virtio-net-pci,netdev=user.0 \ > >>> /var/lib/libvirt/images/vm1.qcow2 > >>> > >>> When guest boots, we can verify whether IR enabled by grepping the > >>> dmesg like: > >>> > >>> [root@localhost ~]# journalctl -k | grep "DMAR-IR" > >>> Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: IOAPIC id 0 under DRHD base 0xfed90000 IOMMU 0 > >>> Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: Enabled IRQ remapping in xapic mode > >>> > >>> Currently only two devices are supported: > >>> > >>> - Emulated IOAPIC device > >>> - PCI Devices > >>> > >>> TODO List: > >>> > >>> - kvm-ioapic support > >> > >> This is probably a must. I don't think we can merge this > >> as long as it breaks kvm. > > > > But kvm-ioapic might require modification to KVM as well. Do you > > think I should add kvm-ioapic into this series as well? Or can I > > first submit this part of work without kvm-ioapic (since this work > > is not related to KVM at all), then work on another one to support > > kvm-ioapic? > > Just go for split irqchip. If we ever need support for in-kernel irqchip > is questionable. Okay. I can add one more patch to support split irqchip I suppose, that should be much easier. The idea would be: to translate interrupts before updating KVM routes in IOAPIC. Also, I may need to take care of IR cache invalidation this time, since if I do the above, remapping will be cached in kernel gsi routes. I suppose irqfd will solve itself too after we support splitted irqchip, since irqfd should be using the gsi routes. Will do more test to confirm this. Thanks. -- peterx