From: Kalle Valo <kvalo@codeaurora.org>
To: Jes Sorensen <Jes.Sorensen@redhat.com>
Cc: linux-wireless@vger.kernel.org, Larry.Finger@lwfinger.net
Subject: Re: [01/18] rtl8xxxu: Add MAC init table for 8192eu
Date: Thu, 14 Apr 2016 12:55:59 +0000 (UTC) [thread overview]
Message-ID: <20160414125559.CF24B60D79@smtp.codeaurora.org> (raw)
In-Reply-To: <1460053173-8494-2-git-send-email-Jes.Sorensen@redhat.com>
> From: Jes Sorensen <Jes.Sorensen@redhat.com>
>
> The 8192eu requires a different MAC init table. Add the missing table
> and specify the table to use in the fileops structure.
>
> Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Thanks, 18 patches applied to wireless-drivers-next.git:
c606e662a5c8 rtl8xxxu: Add MAC init table for 8192eu
2ca73dc786c4 rtl8xxxu: Do not mess with AFE_XTAL_CTRL on 8192eu
80805aa5f33e rtl8xxxu: Set TX page boundaries for 8192eu
19102f841934 rtl8xxxu: Add radio init tables for 8192eu
e293278debe7 rtl8xxxu: Add 8192eu AGC tables
ae14c5d20dc9 rtl8xxxu: Add 8192eu PHY init table
abd71bdb94c3 rtl8xxxu: Pick PHY init table based on chip version first
9e24772ae222 rtl8xxxu: Correctly parse 8192eu efuse
444004bd1349 rtl8xxxu: Handle BB init for 8192eu
2949b9ee77b8 rtl8xxxu: Provide special handling when writing RF regs on 8192eu
8a59485c8ee9 rtl8xxxu: Handle XTAL value setting on 8192eu
57e5e2e650fb rtl8xxxu: Set correct interrupt masking registers on 8192eu
3021e51f2b2f rtl8xxxu: Set REG_USB_HRPWM for 8192eu
e1394fe5f986 rtl8xxxu: Fix LDPC RX hang issue on 8192eu
b052b7fc7d25 rtl8xxxu: Implement 8192eu device specific quirks
70bc1e24d9e2 rtl8xxxu: Use proper register name for REG_PAD_CTRL1
f991f4e9147b rtl8xxxu: Implement IQK calibration for 8192eu
28e460b02c66 rtl8xxxu: Adjust AFE crystal value on 8192eu
Kalle Valo
next prev parent reply other threads:[~2016-04-14 12:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-07 18:19 [PATCH 00/18] rtl8xxxu: Additional code to support rtl8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 01/18] rtl8xxxu: Add MAC init table for 8192eu Jes.Sorensen
2016-04-14 12:55 ` Kalle Valo [this message]
2016-04-07 18:19 ` [PATCH 02/18] rtl8xxxu: Do not mess with AFE_XTAL_CTRL on 8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 03/18] rtl8xxxu: Set TX page boundaries for 8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 04/18] rtl8xxxu: Add radio init tables " Jes.Sorensen
2016-04-07 18:19 ` [PATCH 05/18] rtl8xxxu: Add 8192eu AGC tables Jes.Sorensen
2016-04-07 18:19 ` [PATCH 06/18] rtl8xxxu: Add 8192eu PHY init table Jes.Sorensen
2016-04-07 18:19 ` [PATCH 07/18] rtl8xxxu: Pick PHY init table based on chip version first Jes.Sorensen
2016-04-07 18:19 ` [PATCH 08/18] rtl8xxxu: Correctly parse 8192eu efuse Jes.Sorensen
2016-04-07 18:19 ` [PATCH 09/18] rtl8xxxu: Handle BB init for 8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 10/18] rtl8xxxu: Provide special handling when writing RF regs on 8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 11/18] rtl8xxxu: Handle XTAL value setting " Jes.Sorensen
2016-04-07 18:19 ` [PATCH 12/18] rtl8xxxu: Set correct interrupt masking registers " Jes.Sorensen
2016-04-07 18:19 ` [PATCH 13/18] rtl8xxxu: Set REG_USB_HRPWM for 8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 14/18] rtl8xxxu: Fix LDPC RX hang issue on 8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 15/18] rtl8xxxu: Implement 8192eu device specific quirks Jes.Sorensen
2016-04-07 18:19 ` [PATCH 16/18] rtl8xxxu: Use proper register name for REG_PAD_CTRL1 Jes.Sorensen
2016-04-07 18:19 ` [PATCH 17/18] rtl8xxxu: Implement IQK calibration for 8192eu Jes.Sorensen
2016-04-07 18:19 ` [PATCH 18/18] rtl8xxxu: Adjust AFE crystal value on 8192eu Jes.Sorensen
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