From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Peter Xu <peterx@redhat.com>
Cc: qemu-devel@nongnu.org, imammedo@redhat.com, rth@twiddle.net,
ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com,
mst@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de,
alex.williamson@redhat.com, wexu@redhat.com
Subject: Re: [Qemu-devel] [PATCH v3 12/13] q35: ioapic: add support for split irqchip and irqfd
Date: Fri, 15 Apr 2016 17:31:58 +0200 [thread overview]
Message-ID: <20160415153158.GC18429@potion.brq.redhat.com> (raw)
In-Reply-To: <1460691099-3024-13-git-send-email-peterx@redhat.com>
2016-04-15 11:31+0800, Peter Xu:
> This patch allows Intel IR work with splitted irqchip. Two more fields
> are added to IOAPICCommonState to support the translation process (For
> future AMD IR support, we will need to provide another AMD-specific
> callback for int_remap()). In split irqchip mode, IOAPIC is working in
> user space, only update kernel irq routes when entry changed. When IR is
> enabled, we directly update the kernel with translated messages. It
> works just like a kernel cache for the remapping entries.
(Patches are nice, thanks, I'll be looking how to slap EIM on top.)
> Since KVM irqfd is using kernel gsi routes to deliver interrupts, as
> long as we can support split irqchip, we will support irqfd as
> well. Also, since kernel gsi routes will cache translated interrupts,
> irqfd delivery will not suffer from any performance impact due to IR.
>
> And, since we supported irqfd, vhost devices will be able to work
> seamlessly with IR now. Logically this should contain both vhost-net and
> vhost-user case.
Doesn't look that all callers of kvm_irqchip_update_msi_route() are IR
aware. I think wrapping the remapping around it might be easiest,
kvm_arch_fixup_msi_route() is another candidate.
> Here we avoided capturing IOMMU IR invalidation, based on the assumption
> that, guest kernel will always first update IR entry, then IOAPIC
> entry. As long as guest follows this order to update IOAPIC entries, we
> should be safe.
The OS configures IOAPIC, MSI and IR independently. e.g. changing the
destination LAPIC only updates IRTE and can happen anytime.
You have to update kvm_irqchip routes when IRTE changes.
next prev parent reply other threads:[~2016-04-15 15:32 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-15 3:31 [Qemu-devel] [PATCH v3 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 01/13] intel_iommu: allow queued invalidation for IR Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 02/13] intel_iommu: set IR bit for ECAP register Peter Xu
2016-04-17 2:30 ` Jan Kiszka
2016-04-18 3:11 ` Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 03/13] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 04/13] intel_iommu: define interrupt remap table addr register Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 05/13] intel_iommu: handle interrupt remap enable Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 06/13] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 07/13] intel_iommu: provide helper function vtd_get_iommu Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 08/13] intel_iommu: add IR translation faults defines Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 09/13] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 10/13] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 11/13] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 12/13] q35: ioapic: add support for split irqchip and irqfd Peter Xu
2016-04-15 15:31 ` Radim Krčmář [this message]
2016-04-18 3:30 ` Peter Xu
2016-04-17 2:44 ` Jan Kiszka
2016-04-17 9:45 ` Michael S. Tsirkin
2016-04-18 8:55 ` Peter Xu
2016-04-25 5:00 ` Jan Kiszka
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 13/13] q35: add "int-remap" flag to enable intr Peter Xu
2016-04-17 2:26 ` [Qemu-devel] [PATCH v3 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU Jan Kiszka
2016-04-18 3:14 ` Peter Xu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160415153158.GC18429@potion.brq.redhat.com \
--to=rkrcmar@redhat.com \
--cc=alex.williamson@redhat.com \
--cc=ehabkost@redhat.com \
--cc=imammedo@redhat.com \
--cc=jan.kiszka@web.de \
--cc=jasowang@redhat.com \
--cc=marcel@redhat.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterx@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=wexu@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.