diff for duplicates of <20160415154937.GX4329@intel.com> diff --git a/a/1.txt b/N1/1.txt index bbf9984..b39a2b0 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -9,7 +9,7 @@ reinitialize ADPA when re-enabling the power well. > Now it's not always modesetting on hotplug when it was before though :(, > so I'll get to work on bisecting that. > -> On Thu, 2016-04-14 at 20:59 +0300, Ville Syrjälä wrote: +> On Thu, 2016-04-14 at 20:59 +0300, Ville Syrj�l� wrote: > > On Tue, Mar 29, 2016 at 04:46:30PM -0400, Lyude wrote: > > > > > > On Valleyview, VGA hotplugging is controlled through a seperate register @@ -35,8 +35,8 @@ reinitialize ADPA when re-enabling the power well. > > > CC: stable@vger.kernel.org > > > Signed-off-by: Lyude <cpaul@redhat.com> > > > --- -> > > drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++++++ -> > > 1 file changed, 14 insertions(+) +> > > �drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++++++ +> > > �1 file changed, 14 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c > > > b/drivers/gpu/drm/i915/i915_irq.c @@ -45,18 +45,18 @@ reinitialize ADPA when re-enabling the power well. > > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > > @@ -3611,6 +3611,7 @@ static void valleyview_display_irqs_install(struct > > > drm_i915_private *dev_priv) -> > > { -> > > u32 pipestat_mask; -> > > u32 iir_mask; +> > > �{ +> > > � u32 pipestat_mask; +> > > � u32 iir_mask; > > > + u32 adpa_reg; -> > > enum pipe pipe; -> > > -> > > pipestat_mask = PIPESTAT_INT_STATUS_MASK | +> > > � enum pipe pipe; +> > > � +> > > � pipestat_mask = PIPESTAT_INT_STATUS_MASK | > > > @@ -3627,6 +3628,12 @@ static void valleyview_display_irqs_install(struct > > > drm_i915_private *dev_priv) -> > > for_each_pipe(dev_priv, pipe) -> > > i915_enable_pipestat(dev_priv, pipe, pipestat_mask); -> > > +> > > � for_each_pipe(dev_priv, pipe) +> > > � ������i915_enable_pipestat(dev_priv, pipe, pipestat_mask); +> > > � > > > + if (IS_VALLEYVIEW(dev_priv)) { > > > + adpa_reg = I915_READ(VLV_ADPA); > > > + adpa_reg |= ADPA_CRT_HOTPLUG_ENABLE; @@ -73,27 +73,27 @@ reinitialize ADPA when re-enabling the power well. > > > > > > > > + -> > > iir_mask = I915_DISPLAY_PORT_INTERRUPT | -> > > I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | -> > > I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; +> > > � iir_mask = I915_DISPLAY_PORT_INTERRUPT | +> > > � ���I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | +> > > � ���I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; > > > @@ -3645,8 +3652,15 @@ static void valleyview_display_irqs_uninstall(struct > > > drm_i915_private *dev_priv) -> > > { -> > > u32 pipestat_mask; -> > > u32 iir_mask; +> > > �{ +> > > � u32 pipestat_mask; +> > > � u32 iir_mask; > > > + u32 adpa_reg; -> > > enum pipe pipe; -> > > +> > > � enum pipe pipe; +> > > � > > > + if (IS_VALLEYVIEW(dev_priv)) { > > > + adpa_reg = I915_READ(VLV_ADPA); > > > + adpa_reg &= ~ADPA_CRT_HOTPLUG_ENABLE; > > > + I915_WRITE(VLV_ADPA, adpa_reg); > > > + } > > > + -> > > iir_mask = I915_DISPLAY_PORT_INTERRUPT | -> > > I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | -> > > I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; -> > > -- +> > > � iir_mask = I915_DISPLAY_PORT_INTERRUPT | +> > > � ���I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | +> > > � ���I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; +> > > --� > > > 2.5.5 > > > > > > _______________________________________________ @@ -102,5 +102,5 @@ reinitialize ADPA when re-enabling the power well. > > > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- -Ville Syrjälä +Ville Syrj�l� Intel OTC diff --git a/a/content_digest b/N1/content_digest index b674782..e39bc69 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -24,7 +24,7 @@ "> Now it's not always modesetting on hotplug when it was before though :(,\n" "> so I'll get to work on bisecting that.\n" "> \n" - "> On Thu, 2016-04-14 at 20:59 +0300, Ville Syrj\303\244l\303\244 wrote:\n" + "> On Thu, 2016-04-14 at 20:59 +0300, Ville Syrj\303\257\302\277\302\275l\303\257\302\277\302\275 wrote:\n" "> > On Tue, Mar 29, 2016 at 04:46:30PM -0400, Lyude wrote:\n" "> > > \n" "> > > On Valleyview, VGA hotplugging is controlled through a seperate register\n" @@ -50,8 +50,8 @@ "> > > CC: stable@vger.kernel.org\n" "> > > Signed-off-by: Lyude <cpaul@redhat.com>\n" "> > > ---\n" - "> > > \302\240drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++++++\n" - "> > > \302\2401 file changed, 14 insertions(+)\n" + "> > > \303\257\302\277\302\275drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++++++\n" + "> > > \303\257\302\277\302\2751 file changed, 14 insertions(+)\n" "> > > \n" "> > > diff --git a/drivers/gpu/drm/i915/i915_irq.c\n" "> > > b/drivers/gpu/drm/i915/i915_irq.c\n" @@ -60,18 +60,18 @@ "> > > +++ b/drivers/gpu/drm/i915/i915_irq.c\n" "> > > @@ -3611,6 +3611,7 @@ static void valleyview_display_irqs_install(struct\n" "> > > drm_i915_private *dev_priv)\n" - "> > > \302\240{\n" - "> > > \302\240\tu32 pipestat_mask;\n" - "> > > \302\240\tu32 iir_mask;\n" + "> > > \303\257\302\277\302\275{\n" + "> > > \303\257\302\277\302\275\tu32 pipestat_mask;\n" + "> > > \303\257\302\277\302\275\tu32 iir_mask;\n" "> > > +\tu32 adpa_reg;\n" - "> > > \302\240\tenum pipe pipe;\n" - "> > > \302\240\n" - "> > > \302\240\tpipestat_mask = PIPESTAT_INT_STATUS_MASK |\n" + "> > > \303\257\302\277\302\275\tenum pipe pipe;\n" + "> > > \303\257\302\277\302\275\n" + "> > > \303\257\302\277\302\275\tpipestat_mask = PIPESTAT_INT_STATUS_MASK |\n" "> > > @@ -3627,6 +3628,12 @@ static void valleyview_display_irqs_install(struct\n" "> > > drm_i915_private *dev_priv)\n" - "> > > \302\240\tfor_each_pipe(dev_priv, pipe)\n" - "> > > \302\240\t\t\302\240\302\240\302\240\302\240\302\240\302\240i915_enable_pipestat(dev_priv, pipe, pipestat_mask);\n" - "> > > \302\240\n" + "> > > \303\257\302\277\302\275\tfor_each_pipe(dev_priv, pipe)\n" + "> > > \303\257\302\277\302\275\t\t\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275i915_enable_pipestat(dev_priv, pipe, pipestat_mask);\n" + "> > > \303\257\302\277\302\275\n" "> > > +\tif (IS_VALLEYVIEW(dev_priv)) {\n" "> > > +\t\tadpa_reg = I915_READ(VLV_ADPA);\n" "> > > +\t\tadpa_reg |= ADPA_CRT_HOTPLUG_ENABLE;\n" @@ -88,27 +88,27 @@ "> > \n" "> > > \n" "> > > +\n" - "> > > \302\240\tiir_mask = I915_DISPLAY_PORT_INTERRUPT |\n" - "> > > \302\240\t\t\302\240\302\240\302\240I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |\n" - "> > > \302\240\t\t\302\240\302\240\302\240I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;\n" + "> > > \303\257\302\277\302\275\tiir_mask = I915_DISPLAY_PORT_INTERRUPT |\n" + "> > > \303\257\302\277\302\275\t\t\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |\n" + "> > > \303\257\302\277\302\275\t\t\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;\n" "> > > @@ -3645,8 +3652,15 @@ static void valleyview_display_irqs_uninstall(struct\n" "> > > drm_i915_private *dev_priv)\n" - "> > > \302\240{\n" - "> > > \302\240\tu32 pipestat_mask;\n" - "> > > \302\240\tu32 iir_mask;\n" + "> > > \303\257\302\277\302\275{\n" + "> > > \303\257\302\277\302\275\tu32 pipestat_mask;\n" + "> > > \303\257\302\277\302\275\tu32 iir_mask;\n" "> > > +\tu32 adpa_reg;\n" - "> > > \302\240\tenum pipe pipe;\n" - "> > > \302\240\n" + "> > > \303\257\302\277\302\275\tenum pipe pipe;\n" + "> > > \303\257\302\277\302\275\n" "> > > +\tif (IS_VALLEYVIEW(dev_priv)) {\n" "> > > +\t\tadpa_reg = I915_READ(VLV_ADPA);\n" "> > > +\t\tadpa_reg &= ~ADPA_CRT_HOTPLUG_ENABLE;\n" "> > > +\t\tI915_WRITE(VLV_ADPA, adpa_reg);\n" "> > > +\t}\n" "> > > +\n" - "> > > \302\240\tiir_mask = I915_DISPLAY_PORT_INTERRUPT |\n" - "> > > \302\240\t\t\302\240\302\240\302\240I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |\n" - "> > > \302\240\t\t\302\240\302\240\302\240I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;\n" - "> > > --\302\240\n" + "> > > \303\257\302\277\302\275\tiir_mask = I915_DISPLAY_PORT_INTERRUPT |\n" + "> > > \303\257\302\277\302\275\t\t\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |\n" + "> > > \303\257\302\277\302\275\t\t\303\257\302\277\302\275\303\257\302\277\302\275\303\257\302\277\302\275I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;\n" + "> > > --\303\257\302\277\302\275\n" "> > > 2.5.5\n" "> > > \n" "> > > _______________________________________________\n" @@ -117,7 +117,7 @@ "> > > https://lists.freedesktop.org/mailman/listinfo/dri-devel\n" "\n" "-- \n" - "Ville Syrj\303\244l\303\244\n" + "Ville Syrj\303\257\302\277\302\275l\303\257\302\277\302\275\n" Intel OTC -49eec50477be46c2623eb80cbf8b3f0739dbdb80211a43100017edd667720d8e +74f14357ca70bdc82e1d227ef98139ff989ff4fcafd2361c5608ae64c1da2807
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