From mboxrd@z Thu Jan 1 00:00:00 1970 From: sboyd@codeaurora.org (Stephen Boyd) Date: Fri, 15 Apr 2016 17:31:28 -0700 Subject: [PATCH v3 1/9] ARM: imx: clk-vf610: fix DCU clock tree In-Reply-To: <1459834121-25997-2-git-send-email-stefan@agner.ch> References: <1459834121-25997-1-git-send-email-stefan@agner.ch> <1459834121-25997-2-git-send-email-stefan@agner.ch> Message-ID: <20160416003128.GJ26353@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 04/04, Stefan Agner wrote: > Similar to an earlier fix for the SAI clocks, the DCU clock hierarchy > mixes the bus clock with the display controllers pixel clock. Tests > have shown that the gates in CCM_CCGR3/9 registers do not control > the DCU pixel clock, but only the register access clock (bus clock). > > Fix this by defining the parent clock of VF610_CLK_DCUx to be the bus > clock (ipg_bus). > > Since the clock has not been used far, there are no further changes > needed. > > Signed-off-by: Stefan Agner > --- Acked-by: Stephen Boyd -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH v3 1/9] ARM: imx: clk-vf610: fix DCU clock tree Date: Fri, 15 Apr 2016 17:31:28 -0700 Message-ID: <20160416003128.GJ26353@codeaurora.org> References: <1459834121-25997-1-git-send-email-stefan@agner.ch> <1459834121-25997-2-git-send-email-stefan@agner.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1459834121-25997-2-git-send-email-stefan@agner.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Stefan Agner Cc: jianwei.wang.chn@gmail.com, meng.yi@nxp.com, pawel.moll@arm.com, alison.wang@freescale.com, daniel.vetter@ffwll.ch, mturquette@baylibre.com, ijc+devicetree@hellion.org.uk, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, robh+dt@kernel.org, kernel@pengutronix.de, galak@codeaurora.org, mark.rutland@arm.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, alexander.stein@systec-electronic.com List-Id: devicetree@vger.kernel.org T24gMDQvMDQsIFN0ZWZhbiBBZ25lciB3cm90ZToKPiBTaW1pbGFyIHRvIGFuIGVhcmxpZXIgZml4 IGZvciB0aGUgU0FJIGNsb2NrcywgdGhlIERDVSBjbG9jayBoaWVyYXJjaHkKPiBtaXhlcyB0aGUg YnVzIGNsb2NrIHdpdGggdGhlIGRpc3BsYXkgY29udHJvbGxlcnMgcGl4ZWwgY2xvY2suIFRlc3Rz Cj4gaGF2ZSBzaG93biB0aGF0IHRoZSBnYXRlcyBpbiBDQ01fQ0NHUjMvOSByZWdpc3RlcnMgZG8g bm90IGNvbnRyb2wKPiB0aGUgRENVIHBpeGVsIGNsb2NrLCBidXQgb25seSB0aGUgcmVnaXN0ZXIg YWNjZXNzIGNsb2NrIChidXMgY2xvY2spLgo+IAo+IEZpeCB0aGlzIGJ5IGRlZmluaW5nIHRoZSBw YXJlbnQgY2xvY2sgb2YgVkY2MTBfQ0xLX0RDVXggdG8gYmUgdGhlIGJ1cwo+IGNsb2NrIChpcGdf YnVzKS4KPiAKPiBTaW5jZSB0aGUgY2xvY2sgaGFzIG5vdCBiZWVuIHVzZWQgZmFyLCB0aGVyZSBh cmUgbm8gZnVydGhlciBjaGFuZ2VzCj4gbmVlZGVkLgo+IAo+IFNpZ25lZC1vZmYtYnk6IFN0ZWZh biBBZ25lciA8c3RlZmFuQGFnbmVyLmNoPgo+IC0tLQoKQWNrZWQtYnk6IFN0ZXBoZW4gQm95ZCA8 c2JveWRAY29kZWF1cm9yYS5vcmc+CgotLSAKUXVhbGNvbW0gSW5ub3ZhdGlvbiBDZW50ZXIsIElu Yy4gaXMgYSBtZW1iZXIgb2YgQ29kZSBBdXJvcmEgRm9ydW0sCmEgTGludXggRm91bmRhdGlvbiBD b2xsYWJvcmF0aXZlIFByb2plY3QKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRl c2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8v ZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753283AbcDPAbg (ORCPT ); Fri, 15 Apr 2016 20:31:36 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38976 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751676AbcDPAbc (ORCPT ); Fri, 15 Apr 2016 20:31:32 -0400 Date: Fri, 15 Apr 2016 17:31:28 -0700 From: Stephen Boyd To: Stefan Agner Cc: dri-devel@lists.freedesktop.org, shawnguo@kernel.org, kernel@pengutronix.de, airlied@linux.ie, daniel.vetter@ffwll.ch, jianwei.wang.chn@gmail.com, alison.wang@freescale.com, meng.yi@nxp.com, alexander.stein@systec-electronic.com, mturquette@baylibre.com, mark.rutland@arm.com, robh+dt@kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 1/9] ARM: imx: clk-vf610: fix DCU clock tree Message-ID: <20160416003128.GJ26353@codeaurora.org> References: <1459834121-25997-1-git-send-email-stefan@agner.ch> <1459834121-25997-2-git-send-email-stefan@agner.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1459834121-25997-2-git-send-email-stefan@agner.ch> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/04, Stefan Agner wrote: > Similar to an earlier fix for the SAI clocks, the DCU clock hierarchy > mixes the bus clock with the display controllers pixel clock. Tests > have shown that the gates in CCM_CCGR3/9 registers do not control > the DCU pixel clock, but only the register access clock (bus clock). > > Fix this by defining the parent clock of VF610_CLK_DCUx to be the bus > clock (ipg_bus). > > Since the clock has not been used far, there are no further changes > needed. > > Signed-off-by: Stefan Agner > --- Acked-by: Stephen Boyd -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project