diff for duplicates of <20160420161201.GS7128@xsjsorenbubuntu> diff --git a/a/1.txt b/N1/1.txt index 24a1c17..7f17728 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,19 +2,19 @@ On Wed, 2016-04-20 at 07:55:27 -0700, Appana Durga Kedareswara Rao wrote: > Hi Soren, > > > -----Original Message----- -> > From: S?ren Brinkmann [mailto:soren.brinkmann at xilinx.com] +> > From: Sören Brinkmann [mailto:soren.brinkmann@xilinx.com] > > Sent: Wednesday, April 20, 2016 8:06 PM > > To: Appana Durga Kedareswara Rao <appanad@xilinx.com> -> > Cc: robh+dt at kernel.org; pawel.moll at arm.com; mark.rutland at arm.com; -> > ijc+devicetree at hellion.org.uk; galak at codeaurora.org; Michal Simek -> > <michals@xilinx.com>; vinod.koul at intel.com; dan.j.williams at intel.com; +> > Cc: robh+dt@kernel.org; pawel.moll@arm.com; mark.rutland@arm.com; +> > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; Michal Simek +> > <michals@xilinx.com>; vinod.koul@intel.com; dan.j.williams@intel.com; > > Appana Durga Kedareswara Rao <appanad@xilinx.com>; -> > moritz.fischer at ettus.com; laurent.pinchart at ideasonboard.com; -> > luis at debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah +> > moritz.fischer@ettus.com; laurent.pinchart@ideasonboard.com; +> > luis@debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah > > Choudary Kalluri <punnaia@xilinx.com>; Shubhrajyoti Datta -> > <shubhraj@xilinx.com>; devicetree at vger.kernel.org; linux-arm- -> > kernel at lists.infradead.org; linux-kernel at vger.kernel.org; -> > dmaengine at vger.kernel.org +> > <shubhraj@xilinx.com>; devicetree@vger.kernel.org; linux-arm- +> > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; +> > dmaengine@vger.kernel.org > > Subject: Re: [PATCH v2 2/2] dmaengine: vdma: Add clock support > > > > On Wed, 2016-04-20 at 17:13:19 +0530, Kedareswara rao Appana wrote: @@ -136,7 +136,7 @@ On Wed, 2016-04-20 at 07:55:27 -0700, Appana Durga Kedareswara Rao wrote: > > Here DMA channels are configurable I mean if user select only mm2s channel then we will have > Only 3 clocks. If user selects both mm2s and s2mm channels we will have 5 clocks. -> That?s why reading the number of clocks from the clock-names property. +> That’s why reading the number of clocks from the clock-names property. > > And also the AXI DMA/CDMA Ip support also getting added to this driver for those IP's also the clocks are configurable > For AXI DMA it is either 3 or 4 clocks and for AXI CDMA it is 2 clocks. @@ -150,4 +150,4 @@ cdma, what interfaces it has and how many channels? Based on that, I guess it should be possible to derive what clocks are required for correct operation. - S?ren + Sören diff --git a/a/content_digest b/N1/content_digest index 205d15b..a5dffba 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,29 +2,47 @@ "ref\01461152599-28858-2-git-send-email-appanad@xilinx.com\0" "ref\020160420143622.GP7128@xsjsorenbubuntu\0" "ref\0C246CAC1457055469EF09E3A7AC4E11A4A57930F@XAP-PVEXMBX01.xlnx.xilinx.com\0" - "From\0soren.brinkmann@xilinx.com (S\303\266ren Brinkmann)\0" - "Subject\0[PATCH v2 2/2] dmaengine: vdma: Add clock support\0" + "From\0S\303\266ren Brinkmann <soren.brinkmann@xilinx.com>\0" + "Subject\0Re: [PATCH v2 2/2] dmaengine: vdma: Add clock support\0" "Date\0Wed, 20 Apr 2016 09:12:01 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Appana Durga Kedareswara Rao <appanad@xilinx.com>\0" + "Cc\0Soren Brinkmann <sorenb@xilinx.com>" + robh+dt@kernel.org <robh+dt@kernel.org> + pawel.moll@arm.com <pawel.moll@arm.com> + mark.rutland@arm.com <mark.rutland@arm.com> + ijc+devicetree@hellion.org.uk <ijc+devicetree@hellion.org.uk> + galak@codeaurora.org <galak@codeaurora.org> + Michal Simek <michals@xilinx.com> + vinod.koul@intel.com <vinod.koul@intel.com> + dan.j.williams@intel.com <dan.j.williams@intel.com> + moritz.fischer@ettus.com <moritz.fischer@ettus.com> + laurent.pinchart@ideasonboard.com <laurent.pinchart@ideasonboard.com> + luis@debethencourt.com <luis@debethencourt.com> + Anirudha Sarangi <anirudh@xilinx.com> + Punnaiah Choudary Kalluri <punnaia@xilinx.com> + Shubhrajyoti Datta <shubhraj@xilinx.com> + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + " linux-ker\0" "\00:1\0" "b\0" "On Wed, 2016-04-20 at 07:55:27 -0700, Appana Durga Kedareswara Rao wrote:\n" "> Hi Soren,\n" "> \n" "> > -----Original Message-----\n" - "> > From: S?ren Brinkmann [mailto:soren.brinkmann at xilinx.com]\n" + "> > From: S\303\266ren Brinkmann [mailto:soren.brinkmann@xilinx.com]\n" "> > Sent: Wednesday, April 20, 2016 8:06 PM\n" "> > To: Appana Durga Kedareswara Rao <appanad@xilinx.com>\n" - "> > Cc: robh+dt at kernel.org; pawel.moll at arm.com; mark.rutland at arm.com;\n" - "> > ijc+devicetree at hellion.org.uk; galak at codeaurora.org; Michal Simek\n" - "> > <michals@xilinx.com>; vinod.koul at intel.com; dan.j.williams at intel.com;\n" + "> > Cc: robh+dt@kernel.org; pawel.moll@arm.com; mark.rutland@arm.com;\n" + "> > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; Michal Simek\n" + "> > <michals@xilinx.com>; vinod.koul@intel.com; dan.j.williams@intel.com;\n" "> > Appana Durga Kedareswara Rao <appanad@xilinx.com>;\n" - "> > moritz.fischer at ettus.com; laurent.pinchart at ideasonboard.com;\n" - "> > luis at debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah\n" + "> > moritz.fischer@ettus.com; laurent.pinchart@ideasonboard.com;\n" + "> > luis@debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah\n" "> > Choudary Kalluri <punnaia@xilinx.com>; Shubhrajyoti Datta\n" - "> > <shubhraj@xilinx.com>; devicetree at vger.kernel.org; linux-arm-\n" - "> > kernel at lists.infradead.org; linux-kernel at vger.kernel.org;\n" - "> > dmaengine at vger.kernel.org\n" + "> > <shubhraj@xilinx.com>; devicetree@vger.kernel.org; linux-arm-\n" + "> > kernel@lists.infradead.org; linux-kernel@vger.kernel.org;\n" + "> > dmaengine@vger.kernel.org\n" "> > Subject: Re: [PATCH v2 2/2] dmaengine: vdma: Add clock support\n" "> > \n" "> > On Wed, 2016-04-20 at 17:13:19 +0530, Kedareswara rao Appana wrote:\n" @@ -146,7 +164,7 @@ "> \n" "> Here DMA channels are configurable I mean if user select only mm2s channel then we will have\n" "> Only 3 clocks. If user selects both mm2s and s2mm channels we will have 5 clocks.\n" - "> That?s why reading the number of clocks from the clock-names property.\n" + "> That\342\200\231s why reading the number of clocks from the clock-names property.\n" "> \n" "> And also the AXI DMA/CDMA Ip support also getting added to this driver for those IP's also the clocks are configurable\n" "> For AXI DMA it is either 3 or 4 clocks and for AXI CDMA it is 2 clocks.\n" @@ -160,6 +178,6 @@ "guess it should be possible to derive what clocks are required for\n" "correct operation.\n" "\n" - "\tS?ren" + "\tS\303\266ren" -2fc3f5162f6997df81c20b11d4701e8a766d39c6c66df0e44888beec168378fe +e58a72bc887168caeeab6376e630d1a0c14729d71777f791eb4a9ed041faec43
diff --git a/a/1.txt b/N2/1.txt index 24a1c17..7f17728 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -2,19 +2,19 @@ On Wed, 2016-04-20 at 07:55:27 -0700, Appana Durga Kedareswara Rao wrote: > Hi Soren, > > > -----Original Message----- -> > From: S?ren Brinkmann [mailto:soren.brinkmann at xilinx.com] +> > From: Sören Brinkmann [mailto:soren.brinkmann@xilinx.com] > > Sent: Wednesday, April 20, 2016 8:06 PM > > To: Appana Durga Kedareswara Rao <appanad@xilinx.com> -> > Cc: robh+dt at kernel.org; pawel.moll at arm.com; mark.rutland at arm.com; -> > ijc+devicetree at hellion.org.uk; galak at codeaurora.org; Michal Simek -> > <michals@xilinx.com>; vinod.koul at intel.com; dan.j.williams at intel.com; +> > Cc: robh+dt@kernel.org; pawel.moll@arm.com; mark.rutland@arm.com; +> > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; Michal Simek +> > <michals@xilinx.com>; vinod.koul@intel.com; dan.j.williams@intel.com; > > Appana Durga Kedareswara Rao <appanad@xilinx.com>; -> > moritz.fischer at ettus.com; laurent.pinchart at ideasonboard.com; -> > luis at debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah +> > moritz.fischer@ettus.com; laurent.pinchart@ideasonboard.com; +> > luis@debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah > > Choudary Kalluri <punnaia@xilinx.com>; Shubhrajyoti Datta -> > <shubhraj@xilinx.com>; devicetree at vger.kernel.org; linux-arm- -> > kernel at lists.infradead.org; linux-kernel at vger.kernel.org; -> > dmaengine at vger.kernel.org +> > <shubhraj@xilinx.com>; devicetree@vger.kernel.org; linux-arm- +> > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; +> > dmaengine@vger.kernel.org > > Subject: Re: [PATCH v2 2/2] dmaengine: vdma: Add clock support > > > > On Wed, 2016-04-20 at 17:13:19 +0530, Kedareswara rao Appana wrote: @@ -136,7 +136,7 @@ On Wed, 2016-04-20 at 07:55:27 -0700, Appana Durga Kedareswara Rao wrote: > > Here DMA channels are configurable I mean if user select only mm2s channel then we will have > Only 3 clocks. If user selects both mm2s and s2mm channels we will have 5 clocks. -> That?s why reading the number of clocks from the clock-names property. +> That’s why reading the number of clocks from the clock-names property. > > And also the AXI DMA/CDMA Ip support also getting added to this driver for those IP's also the clocks are configurable > For AXI DMA it is either 3 or 4 clocks and for AXI CDMA it is 2 clocks. @@ -150,4 +150,4 @@ cdma, what interfaces it has and how many channels? Based on that, I guess it should be possible to derive what clocks are required for correct operation. - S?ren + Sören diff --git a/a/content_digest b/N2/content_digest index 205d15b..594ec16 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,29 +2,48 @@ "ref\01461152599-28858-2-git-send-email-appanad@xilinx.com\0" "ref\020160420143622.GP7128@xsjsorenbubuntu\0" "ref\0C246CAC1457055469EF09E3A7AC4E11A4A57930F@XAP-PVEXMBX01.xlnx.xilinx.com\0" - "From\0soren.brinkmann@xilinx.com (S\303\266ren Brinkmann)\0" - "Subject\0[PATCH v2 2/2] dmaengine: vdma: Add clock support\0" + "From\0S\303\266ren Brinkmann <soren.brinkmann@xilinx.com>\0" + "Subject\0Re: [PATCH v2 2/2] dmaengine: vdma: Add clock support\0" "Date\0Wed, 20 Apr 2016 09:12:01 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Appana Durga Kedareswara Rao <appanad@xilinx.com>\0" + "Cc\0Soren Brinkmann <sorenb@xilinx.com>" + robh+dt@kernel.org <robh+dt@kernel.org> + pawel.moll@arm.com <pawel.moll@arm.com> + mark.rutland@arm.com <mark.rutland@arm.com> + ijc+devicetree@hellion.org.uk <ijc+devicetree@hellion.org.uk> + galak@codeaurora.org <galak@codeaurora.org> + Michal Simek <michals@xilinx.com> + vinod.koul@intel.com <vinod.koul@intel.com> + dan.j.williams@intel.com <dan.j.williams@intel.com> + moritz.fischer@ettus.com <moritz.fischer@ettus.com> + laurent.pinchart@ideasonboard.com <laurent.pinchart@ideasonboard.com> + luis@debethencourt.com <luis@debethencourt.com> + Anirudha Sarangi <anirudh@xilinx.com> + Punnaiah Choudary Kalluri <punnaia@xilinx.com> + Shubhrajyoti Datta <shubhraj@xilinx.com> + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + " dmaengine@vger.kernel.org <dmaengine@vger.kernel.org>\0" "\00:1\0" "b\0" "On Wed, 2016-04-20 at 07:55:27 -0700, Appana Durga Kedareswara Rao wrote:\n" "> Hi Soren,\n" "> \n" "> > -----Original Message-----\n" - "> > From: S?ren Brinkmann [mailto:soren.brinkmann at xilinx.com]\n" + "> > From: S\303\266ren Brinkmann [mailto:soren.brinkmann@xilinx.com]\n" "> > Sent: Wednesday, April 20, 2016 8:06 PM\n" "> > To: Appana Durga Kedareswara Rao <appanad@xilinx.com>\n" - "> > Cc: robh+dt at kernel.org; pawel.moll at arm.com; mark.rutland at arm.com;\n" - "> > ijc+devicetree at hellion.org.uk; galak at codeaurora.org; Michal Simek\n" - "> > <michals@xilinx.com>; vinod.koul at intel.com; dan.j.williams at intel.com;\n" + "> > Cc: robh+dt@kernel.org; pawel.moll@arm.com; mark.rutland@arm.com;\n" + "> > ijc+devicetree@hellion.org.uk; galak@codeaurora.org; Michal Simek\n" + "> > <michals@xilinx.com>; vinod.koul@intel.com; dan.j.williams@intel.com;\n" "> > Appana Durga Kedareswara Rao <appanad@xilinx.com>;\n" - "> > moritz.fischer at ettus.com; laurent.pinchart at ideasonboard.com;\n" - "> > luis at debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah\n" + "> > moritz.fischer@ettus.com; laurent.pinchart@ideasonboard.com;\n" + "> > luis@debethencourt.com; Anirudha Sarangi <anirudh@xilinx.com>; Punnaiah\n" "> > Choudary Kalluri <punnaia@xilinx.com>; Shubhrajyoti Datta\n" - "> > <shubhraj@xilinx.com>; devicetree at vger.kernel.org; linux-arm-\n" - "> > kernel at lists.infradead.org; linux-kernel at vger.kernel.org;\n" - "> > dmaengine at vger.kernel.org\n" + "> > <shubhraj@xilinx.com>; devicetree@vger.kernel.org; linux-arm-\n" + "> > kernel@lists.infradead.org; linux-kernel@vger.kernel.org;\n" + "> > dmaengine@vger.kernel.org\n" "> > Subject: Re: [PATCH v2 2/2] dmaengine: vdma: Add clock support\n" "> > \n" "> > On Wed, 2016-04-20 at 17:13:19 +0530, Kedareswara rao Appana wrote:\n" @@ -146,7 +165,7 @@ "> \n" "> Here DMA channels are configurable I mean if user select only mm2s channel then we will have\n" "> Only 3 clocks. If user selects both mm2s and s2mm channels we will have 5 clocks.\n" - "> That?s why reading the number of clocks from the clock-names property.\n" + "> That\342\200\231s why reading the number of clocks from the clock-names property.\n" "> \n" "> And also the AXI DMA/CDMA Ip support also getting added to this driver for those IP's also the clocks are configurable\n" "> For AXI DMA it is either 3 or 4 clocks and for AXI CDMA it is 2 clocks.\n" @@ -160,6 +179,6 @@ "guess it should be possible to derive what clocks are required for\n" "correct operation.\n" "\n" - "\tS?ren" + "\tS\303\266ren" -2fc3f5162f6997df81c20b11d4701e8a766d39c6c66df0e44888beec168378fe +599eae81084f11f072e1f1012119cdd5e109fd6305f657a0e59c0c4f5dc6b879
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