From: Aurelien Jarno <aurelien@aurel32.net>
To: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] MIPS: Allow emulation for unaligned [LS]DXC1 instructions
Date: Thu, 21 Apr 2016 16:59:41 +0200 [thread overview]
Message-ID: <20160421145941.GA13269@aurel32.net> (raw)
In-Reply-To: <1461237938-15228-1-git-send-email-paul.burton@imgtec.com>
On 2016-04-21 12:25, Paul Burton wrote:
> If an address error exception occurs for a LDXC1 or SDXC1 instruction,
> within the cop1x opcode space, allow it to be passed through to the FPU
> emulator rather than resulting in a SIGILL. This causes LDXC1 & SDXC1 to
> be handled in a manner consistent with the more common LDC1 & SDC1
> instructions.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
> Hi Aurelien,
>
> Thanks for tracking that down. Does this simple patch fix your problem?
>
Thanks for the quick patch. I confirm this fixes the issue, so you can
add a:
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
prev parent reply other threads:[~2016-04-21 14:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-21 10:19 Emulation of unaligned LDXC1/SDXC1 instructions Aurelien Jarno
2016-04-21 11:25 ` [PATCH] MIPS: Allow emulation for unaligned [LS]DXC1 instructions Paul Burton
2016-04-21 11:25 ` Paul Burton
2016-04-21 14:59 ` Aurelien Jarno [this message]
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