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Date: Fri, 22 Apr 2016 11:34:00 +0200
From: Borislav Petkov <bp@alien8.de>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Peter Zijlstra <a.p.zijlstra@chello.nl>,
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        vince@deater.net, eranian@google.com,
        Arnaldo Carvalho de Melo <acme@infradead.org>,
        Mathieu Poirier <mathieu.poirier@linaro.org>
Subject: Re: [PATCH v1 2/5] perf/x86/intel/pt: IP filtering register/cpuid
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On Fri, Apr 22, 2016 at 09:58:31AM +0200, Thomas Gleixner wrote:
> That's really not the same thing. pci ids are issued by a gazillion of vendors
> for a bazillion of different devices. There is no consistent view for them.

So my reasoning was to not add *every* MSR to that file, especially the
ones which are strictly topical. For example, the MCA MSRs which can
easily live in mce.h as nothing else needs to touch them...

> MSRs on the other hand are x86 specific registers nicely defined in the
> SDM/APM and having at least the MSR defines in a single header makes a lot of
> sense.

... but ok. I see there could be some merit of keeping them all in the
same place. We can always change that if the handling of msr-index.h
starts becoming too unwieldy.

In any case, we'd need to zap

053080a9d1c8 ("x86/msr: Document msr-index.h rule for addition")

now.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.