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diff for duplicates of <20160422111245.GA9047@ulmo.ba.sec>

diff --git a/a/1.txt b/N1/1.txt
index 16c1f54..8a7d4dd 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -11,13 +11,13 @@ On Tue, Apr 12, 2016 at 06:41:50PM +0100, Jon Hunter wrote:
 > >>>>>> Old Signed by an unknown key
 > >>>>>
 > >>>>> On Thu, Mar 10, 2016 at 02:38:05PM -0500, Rhyland Klein wrote:
-> >>>>>> From: Bill Huang <bilhuang@nvidia.com>
+> >>>>>> From: Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
 > >>>>>>
 > >>>>>> Add some SLCG (Second Level Clock Gating) override clocks to control
 > >>>>>> gating and un-gating their logics.
 > >>>>>>
-> >>>>>> Signed-off-by: Bill Huang <bilhuang@nvidia.com>
-> >>>>>> Signed-off-by: Rhyland Klein <rklein@nvidia.com>
+> >>>>>> Signed-off-by: Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+> >>>>>> Signed-off-by: Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
 > >>>>>> ---
 > >>>>>>  drivers/clk/tegra/clk-id.h               | 16 ++++++
 > >>>>>>  drivers/clk/tegra/clk-tegra210.c         | 91 ++++++++++++++++++++++++++++++++
@@ -41,7 +41,7 @@ On Tue, Apr 12, 2016 at 06:41:50PM +0100, Jon Hunter wrote:
 > >>> 3.18 kernel and mainline. However, if you wish to wait until we need
 > >>> them I guess we can. Otherwise ...
 > >>>
-> >>> Acked-by: Jon Hunter <jonathanh@nvidia.com>
+> >>> Acked-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
 > >>>
 > >>> Cheers
 > >>> Jon
diff --git a/a/content_digest b/N1/content_digest
index f0dd1e0..e7f0014 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -5,20 +5,21 @@
  "ref\056F581BF.2070903@nvidia.com\0"
  "ref\020160412152026.GE25160@ulmo.ba.sec\0"
  "ref\0570D335E.9020202@nvidia.com\0"
- "From\0Thierry Reding <thierry.reding@gmail.com>\0"
+ "ref\0570D335E.9020202-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0"
+ "From\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
  "Subject\0Re: [PATCH] clk: tegra210: Add SLCG override gate clocks\0"
  "Date\0Fri, 22 Apr 2016 13:12:45 +0200\0"
- "To\0Jon Hunter <jonathanh@nvidia.com>\0"
- "Cc\0Rhyland Klein <rklein@nvidia.com>"
-  Peter De Schrijver <pdeschrijver@nvidia.com>
-  Prashant Gaikwad <pgaikwad@nvidia.com>
-  Michael Turquette <mturquette@baylibre.com>
-  Stephen Boyd <sboyd@codeaurora.org>
-  Stephen Warren <swarren@wwwdotorg.org>
-  Alexandre Courbot <gnurou@gmail.com>
-  linux-clk@vger.kernel.org
-  linux-tegra@vger.kernel.org
- " Bill Huang <bilhuang@nvidia.com>\0"
+ "To\0Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
+ "Cc\0Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>"
+  Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+  Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+  Michael Turquette <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
+  Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+  Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
+  Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+ " Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
  "\01:1\0"
  "b\0"
  "On Tue, Apr 12, 2016 at 06:41:50PM +0100, Jon Hunter wrote:\n"
@@ -34,13 +35,13 @@
  "> >>>>>> Old Signed by an unknown key\n"
  "> >>>>>\n"
  "> >>>>> On Thu, Mar 10, 2016 at 02:38:05PM -0500, Rhyland Klein wrote:\n"
- "> >>>>>> From: Bill Huang <bilhuang@nvidia.com>\n"
+ "> >>>>>> From: Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
  "> >>>>>>\n"
  "> >>>>>> Add some SLCG (Second Level Clock Gating) override clocks to control\n"
  "> >>>>>> gating and un-gating their logics.\n"
  "> >>>>>>\n"
- "> >>>>>> Signed-off-by: Bill Huang <bilhuang@nvidia.com>\n"
- "> >>>>>> Signed-off-by: Rhyland Klein <rklein@nvidia.com>\n"
+ "> >>>>>> Signed-off-by: Bill Huang <bilhuang-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ "> >>>>>> Signed-off-by: Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
  "> >>>>>> ---\n"
  "> >>>>>>  drivers/clk/tegra/clk-id.h               | 16 ++++++\n"
  "> >>>>>>  drivers/clk/tegra/clk-tegra210.c         | 91 ++++++++++++++++++++++++++++++++\n"
@@ -64,7 +65,7 @@
  "> >>> 3.18 kernel and mainline. However, if you wish to wait until we need\n"
  "> >>> them I guess we can. Otherwise ...\n"
  "> >>>\n"
- "> >>> Acked-by: Jon Hunter <jonathanh@nvidia.com>\n"
+ "> >>> Acked-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
  "> >>>\n"
  "> >>> Cheers\n"
  "> >>> Jon\n"
@@ -109,4 +110,4 @@
  "=9tmM\n"
  "-----END PGP SIGNATURE-----\n"
 
-2f9169302519178dc22cb76fa7654fb5e2fb4d24e754fab98e1de1a11d934642
+8c9301ef4d33b881b8fc01e0e7fc01ba0a38db04ba8f2e3d8413ee096c135d07

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