diff for duplicates of <20160422142316.GI10289@arm.com> diff --git a/a/1.txt b/N1/1.txt index c4b8732..d660221 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -13,107 +13,3 @@ for the LL/SC variants. Fixup below. Will --->8 - -From ff2863445fb2a11dcd0cab4aaaeebe28aa5c9937 Mon Sep 17 00:00:00 2001 -From: Will Deacon <will.deacon@arm.com> -Date: Fri, 22 Apr 2016 14:30:54 +0100 -Subject: [PATCH] fixup! locking,arm64: Implement - atomic{,64}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}() - -Get the ll/sc stuff building and working - -Signed-off-by: Will Deacon <will.deacon@arm.com> ---- - arch/arm64/include/asm/atomic.h | 30 ++++++++++++++++++++++++++++++ - arch/arm64/include/asm/atomic_ll_sc.h | 8 ++++---- - 2 files changed, 34 insertions(+), 4 deletions(-) - -diff --git a/arch/arm64/include/asm/atomic.h b/arch/arm64/include/asm/atomic.h -index 83b74b67c04b..c0235e0ff849 100644 ---- a/arch/arm64/include/asm/atomic.h -+++ b/arch/arm64/include/asm/atomic.h -@@ -155,6 +155,36 @@ - #define atomic64_dec_return_release(v) atomic64_sub_return_release(1, (v)) - #define atomic64_dec_return(v) atomic64_sub_return(1, (v)) - -+#define atomic64_fetch_add_relaxed atomic64_fetch_add_relaxed -+#define atomic64_fetch_add_acquire atomic64_fetch_add_acquire -+#define atomic64_fetch_add_release atomic64_fetch_add_release -+#define atomic64_fetch_add atomic64_fetch_add -+ -+#define atomic64_fetch_sub_relaxed atomic64_fetch_sub_relaxed -+#define atomic64_fetch_sub_acquire atomic64_fetch_sub_acquire -+#define atomic64_fetch_sub_release atomic64_fetch_sub_release -+#define atomic64_fetch_sub atomic64_fetch_sub -+ -+#define atomic64_fetch_and_relaxed atomic64_fetch_and_relaxed -+#define atomic64_fetch_and_acquire atomic64_fetch_and_acquire -+#define atomic64_fetch_and_release atomic64_fetch_and_release -+#define atomic64_fetch_and atomic64_fetch_and -+ -+#define atomic64_fetch_andnot_relaxed atomic64_fetch_andnot_relaxed -+#define atomic64_fetch_andnot_acquire atomic64_fetch_andnot_acquire -+#define atomic64_fetch_andnot_release atomic64_fetch_andnot_release -+#define atomic64_fetch_andnot atomic64_fetch_andnot -+ -+#define atomic64_fetch_or_relaxed atomic64_fetch_or_relaxed -+#define atomic64_fetch_or_acquire atomic64_fetch_or_acquire -+#define atomic64_fetch_or_release atomic64_fetch_or_release -+#define atomic64_fetch_or atomic64_fetch_or -+ -+#define atomic64_fetch_xor_relaxed atomic64_fetch_xor_relaxed -+#define atomic64_fetch_xor_acquire atomic64_fetch_xor_acquire -+#define atomic64_fetch_xor_release atomic64_fetch_xor_release -+#define atomic64_fetch_xor atomic64_fetch_xor -+ - #define atomic64_xchg_relaxed atomic_xchg_relaxed - #define atomic64_xchg_acquire atomic_xchg_acquire - #define atomic64_xchg_release atomic_xchg_release -diff --git a/arch/arm64/include/asm/atomic_ll_sc.h b/arch/arm64/include/asm/atomic_ll_sc.h -index f92806390c9a..2b29db9593c7 100644 ---- a/arch/arm64/include/asm/atomic_ll_sc.h -+++ b/arch/arm64/include/asm/atomic_ll_sc.h -@@ -127,6 +127,7 @@ ATOMIC_OPS(or, orr) - ATOMIC_OPS(xor, eor) - - #undef ATOMIC_OPS -+#undef ATOMIC_FETCH_OP - #undef ATOMIC_OP_RETURN - #undef ATOMIC_OP - -@@ -195,11 +196,10 @@ __LL_SC_EXPORT(atomic64_##op##_return##name); - #define ATOMIC64_OPS(...) \ - ATOMIC64_OP(__VA_ARGS__) \ - ATOMIC64_OP_RETURN(, dmb ish, , l, "memory", __VA_ARGS__) \ -- ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \ -- ATOMIC64_OPS(__VA_ARGS__) \ - ATOMIC64_OP_RETURN(_relaxed,, , , , __VA_ARGS__) \ - ATOMIC64_OP_RETURN(_acquire,, a, , "memory", __VA_ARGS__) \ - ATOMIC64_OP_RETURN(_release,, , l, "memory", __VA_ARGS__) \ -+ ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \ - ATOMIC64_FETCH_OP (_relaxed,, , , , __VA_ARGS__) \ - ATOMIC64_FETCH_OP (_acquire,, a, , "memory", __VA_ARGS__) \ - ATOMIC64_FETCH_OP (_release,, , l, "memory", __VA_ARGS__) -@@ -207,11 +207,10 @@ __LL_SC_EXPORT(atomic64_##op##_return##name); - ATOMIC64_OPS(add, add) - ATOMIC64_OPS(sub, sub) - --#undef ATOMIC_OPS -+#undef ATOMIC64_OPS - #define ATOMIC64_OPS(...) \ - ATOMIC64_OP(__VA_ARGS__) \ - ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \ -- ATOMIC64_OPS(__VA_ARGS__) \ - ATOMIC64_FETCH_OP (_relaxed,, , , , __VA_ARGS__) \ - ATOMIC64_FETCH_OP (_acquire,, a, , "memory", __VA_ARGS__) \ - ATOMIC64_FETCH_OP (_release,, , l, "memory", __VA_ARGS__) -@@ -222,6 +221,7 @@ ATOMIC64_OPS(or, orr) - ATOMIC64_OPS(xor, eor) - - #undef ATOMIC64_OPS -+#undef ATOMIC64_FETCH_OP - #undef ATOMIC64_OP_RETURN - #undef ATOMIC64_OP - --- -2.1.4 diff --git a/a/content_digest b/N1/content_digest index 8aea349..2baadd0 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -51,110 +51,6 @@ "\n" "Will\n" "\n" - "--->8\n" - "\n" - "From ff2863445fb2a11dcd0cab4aaaeebe28aa5c9937 Mon Sep 17 00:00:00 2001\n" - "From: Will Deacon <will.deacon@arm.com>\n" - "Date: Fri, 22 Apr 2016 14:30:54 +0100\n" - "Subject: [PATCH] fixup! locking,arm64: Implement\n" - " atomic{,64}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()\n" - "\n" - "Get the ll/sc stuff building and working\n" - "\n" - "Signed-off-by: Will Deacon <will.deacon@arm.com>\n" - "---\n" - " arch/arm64/include/asm/atomic.h | 30 ++++++++++++++++++++++++++++++\n" - " arch/arm64/include/asm/atomic_ll_sc.h | 8 ++++----\n" - " 2 files changed, 34 insertions(+), 4 deletions(-)\n" - "\n" - "diff --git a/arch/arm64/include/asm/atomic.h b/arch/arm64/include/asm/atomic.h\n" - "index 83b74b67c04b..c0235e0ff849 100644\n" - "--- a/arch/arm64/include/asm/atomic.h\n" - "+++ b/arch/arm64/include/asm/atomic.h\n" - "@@ -155,6 +155,36 @@\n" - " #define atomic64_dec_return_release(v)\tatomic64_sub_return_release(1, (v))\n" - " #define atomic64_dec_return(v)\t\tatomic64_sub_return(1, (v))\n" - " \n" - "+#define atomic64_fetch_add_relaxed\tatomic64_fetch_add_relaxed\n" - "+#define atomic64_fetch_add_acquire\tatomic64_fetch_add_acquire\n" - "+#define atomic64_fetch_add_release\tatomic64_fetch_add_release\n" - "+#define atomic64_fetch_add\t\tatomic64_fetch_add\n" - "+\n" - "+#define atomic64_fetch_sub_relaxed\tatomic64_fetch_sub_relaxed\n" - "+#define atomic64_fetch_sub_acquire\tatomic64_fetch_sub_acquire\n" - "+#define atomic64_fetch_sub_release\tatomic64_fetch_sub_release\n" - "+#define atomic64_fetch_sub\t\tatomic64_fetch_sub\n" - "+\n" - "+#define atomic64_fetch_and_relaxed\tatomic64_fetch_and_relaxed\n" - "+#define atomic64_fetch_and_acquire\tatomic64_fetch_and_acquire\n" - "+#define atomic64_fetch_and_release\tatomic64_fetch_and_release\n" - "+#define atomic64_fetch_and\t\tatomic64_fetch_and\n" - "+\n" - "+#define atomic64_fetch_andnot_relaxed\tatomic64_fetch_andnot_relaxed\n" - "+#define atomic64_fetch_andnot_acquire\tatomic64_fetch_andnot_acquire\n" - "+#define atomic64_fetch_andnot_release\tatomic64_fetch_andnot_release\n" - "+#define atomic64_fetch_andnot\t\tatomic64_fetch_andnot\n" - "+\n" - "+#define atomic64_fetch_or_relaxed\tatomic64_fetch_or_relaxed\n" - "+#define atomic64_fetch_or_acquire\tatomic64_fetch_or_acquire\n" - "+#define atomic64_fetch_or_release\tatomic64_fetch_or_release\n" - "+#define atomic64_fetch_or\t\tatomic64_fetch_or\n" - "+\n" - "+#define atomic64_fetch_xor_relaxed\tatomic64_fetch_xor_relaxed\n" - "+#define atomic64_fetch_xor_acquire\tatomic64_fetch_xor_acquire\n" - "+#define atomic64_fetch_xor_release\tatomic64_fetch_xor_release\n" - "+#define atomic64_fetch_xor\t\tatomic64_fetch_xor\n" - "+\n" - " #define atomic64_xchg_relaxed\t\tatomic_xchg_relaxed\n" - " #define atomic64_xchg_acquire\t\tatomic_xchg_acquire\n" - " #define atomic64_xchg_release\t\tatomic_xchg_release\n" - "diff --git a/arch/arm64/include/asm/atomic_ll_sc.h b/arch/arm64/include/asm/atomic_ll_sc.h\n" - "index f92806390c9a..2b29db9593c7 100644\n" - "--- a/arch/arm64/include/asm/atomic_ll_sc.h\n" - "+++ b/arch/arm64/include/asm/atomic_ll_sc.h\n" - "@@ -127,6 +127,7 @@ ATOMIC_OPS(or, orr)\n" - " ATOMIC_OPS(xor, eor)\n" - " \n" - " #undef ATOMIC_OPS\n" - "+#undef ATOMIC_FETCH_OP\n" - " #undef ATOMIC_OP_RETURN\n" - " #undef ATOMIC_OP\n" - " \n" - "@@ -195,11 +196,10 @@ __LL_SC_EXPORT(atomic64_##op##_return##name);\n" - " #define ATOMIC64_OPS(...)\t\t\t\t\t\t\\\n" - " \tATOMIC64_OP(__VA_ARGS__)\t\t\t\t\t\\\n" - " \tATOMIC64_OP_RETURN(, dmb ish, , l, \"memory\", __VA_ARGS__)\t\\\n" - "-\tATOMIC64_FETCH_OP (, dmb ish, , l, \"memory\", __VA_ARGS__)\t\\\n" - "-\tATOMIC64_OPS(__VA_ARGS__)\t\t\t\t\t\\\n" - " \tATOMIC64_OP_RETURN(_relaxed,, , , , __VA_ARGS__)\t\\\n" - " \tATOMIC64_OP_RETURN(_acquire,, a, , \"memory\", __VA_ARGS__)\t\\\n" - " \tATOMIC64_OP_RETURN(_release,, , l, \"memory\", __VA_ARGS__)\t\\\n" - "+\tATOMIC64_FETCH_OP (, dmb ish, , l, \"memory\", __VA_ARGS__)\t\\\n" - " \tATOMIC64_FETCH_OP (_relaxed,, , , , __VA_ARGS__)\t\\\n" - " \tATOMIC64_FETCH_OP (_acquire,, a, , \"memory\", __VA_ARGS__)\t\\\n" - " \tATOMIC64_FETCH_OP (_release,, , l, \"memory\", __VA_ARGS__)\n" - "@@ -207,11 +207,10 @@ __LL_SC_EXPORT(atomic64_##op##_return##name);\n" - " ATOMIC64_OPS(add, add)\n" - " ATOMIC64_OPS(sub, sub)\n" - " \n" - "-#undef ATOMIC_OPS\n" - "+#undef ATOMIC64_OPS\n" - " #define ATOMIC64_OPS(...)\t\t\t\t\t\t\\\n" - " \tATOMIC64_OP(__VA_ARGS__)\t\t\t\t\t\\\n" - " \tATOMIC64_FETCH_OP (, dmb ish, , l, \"memory\", __VA_ARGS__)\t\\\n" - "-\tATOMIC64_OPS(__VA_ARGS__)\t\t\t\t\t\\\n" - " \tATOMIC64_FETCH_OP (_relaxed,, , , , __VA_ARGS__)\t\\\n" - " \tATOMIC64_FETCH_OP (_acquire,, a, , \"memory\", __VA_ARGS__)\t\\\n" - " \tATOMIC64_FETCH_OP (_release,, , l, \"memory\", __VA_ARGS__)\n" - "@@ -222,6 +221,7 @@ ATOMIC64_OPS(or, orr)\n" - " ATOMIC64_OPS(xor, eor)\n" - " \n" - " #undef ATOMIC64_OPS\n" - "+#undef ATOMIC64_FETCH_OP\n" - " #undef ATOMIC64_OP_RETURN\n" - " #undef ATOMIC64_OP\n" - " \n" - "-- \n" - 2.1.4 + --->8 -0c4c19d2e01185aa48186bc02a79b96c97d35ed353755cee3b17ea2a0aaffacb +67408b9f9c33412825bbab17d42def6e146c9ac106e4a00ce460bd64d44f5beb
diff --git a/a/1.txt b/N2/1.txt index c4b8732..6e08562 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -14,7 +14,7 @@ Will --->8 -From ff2863445fb2a11dcd0cab4aaaeebe28aa5c9937 Mon Sep 17 00:00:00 2001 +>From ff2863445fb2a11dcd0cab4aaaeebe28aa5c9937 Mon Sep 17 00:00:00 2001 From: Will Deacon <will.deacon@arm.com> Date: Fri, 22 Apr 2016 14:30:54 +0100 Subject: [PATCH] fixup! locking,arm64: Implement diff --git a/a/content_digest b/N2/content_digest index 8aea349..65b78ab 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -53,7 +53,7 @@ "\n" "--->8\n" "\n" - "From ff2863445fb2a11dcd0cab4aaaeebe28aa5c9937 Mon Sep 17 00:00:00 2001\n" + ">From ff2863445fb2a11dcd0cab4aaaeebe28aa5c9937 Mon Sep 17 00:00:00 2001\n" "From: Will Deacon <will.deacon@arm.com>\n" "Date: Fri, 22 Apr 2016 14:30:54 +0100\n" "Subject: [PATCH] fixup! locking,arm64: Implement\n" @@ -157,4 +157,4 @@ "-- \n" 2.1.4 -0c4c19d2e01185aa48186bc02a79b96c97d35ed353755cee3b17ea2a0aaffacb +1a1c1e7ea39c91d1a7fa326e4f03fe11dac4d078403362182575fd01c5cf774d
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