* [PATCH v2 0/2] DRA7x: Increase QSPI frequency to 64MHz @ 2016-04-20 11:32 ` Vignesh R 0 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:32 UTC (permalink / raw) To: Tony Lindgren Cc: Rob Herring, Vignesh R, nsekhar-l0cyMroinI0, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-omap-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r This patch series increases QSPI bus frequency to 64MHz and switch to SPI mode 0 in order to increase read/write throughput. First patch removes QSPI pinmux from DT as pinmux can only be done in U-Boot(see patch commit message for more info). Second patch does the dts changes to support 64MHz mode 0 operation. Tested on DRA74 and DRA72 EVM with U-Boot 2016.05-rc1. Vignesh R (2): ARM: dts: dra7x: Remove QSPI pinmux ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ arch/arm/boot/dts/dra7-evm.dts | 23 ++--------------------- arch/arm/boot/dts/dra72-evm-common.dtsi | 20 ++------------------ 3 files changed, 11 insertions(+), 39 deletions(-) -- 2.8.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 0/2] DRA7x: Increase QSPI frequency to 64MHz @ 2016-04-20 11:32 ` Vignesh R 0 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:32 UTC (permalink / raw) To: Tony Lindgren Cc: Rob Herring, Vignesh R, nsekhar, devicetree, linux-kernel, linux-omap, linux-arm-kernel This patch series increases QSPI bus frequency to 64MHz and switch to SPI mode 0 in order to increase read/write throughput. First patch removes QSPI pinmux from DT as pinmux can only be done in U-Boot(see patch commit message for more info). Second patch does the dts changes to support 64MHz mode 0 operation. Tested on DRA74 and DRA72 EVM with U-Boot 2016.05-rc1. Vignesh R (2): ARM: dts: dra7x: Remove QSPI pinmux ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ arch/arm/boot/dts/dra7-evm.dts | 23 ++--------------------- arch/arm/boot/dts/dra72-evm-common.dtsi | 20 ++------------------ 3 files changed, 11 insertions(+), 39 deletions(-) -- 2.8.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 0/2] DRA7x: Increase QSPI frequency to 64MHz @ 2016-04-20 11:32 ` Vignesh R 0 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:32 UTC (permalink / raw) To: linux-arm-kernel This patch series increases QSPI bus frequency to 64MHz and switch to SPI mode 0 in order to increase read/write throughput. First patch removes QSPI pinmux from DT as pinmux can only be done in U-Boot(see patch commit message for more info). Second patch does the dts changes to support 64MHz mode 0 operation. Tested on DRA74 and DRA72 EVM with U-Boot 2016.05-rc1. Vignesh R (2): ARM: dts: dra7x: Remove QSPI pinmux ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ arch/arm/boot/dts/dra7-evm.dts | 23 ++--------------------- arch/arm/boot/dts/dra72-evm-common.dtsi | 20 ++------------------ 3 files changed, 11 insertions(+), 39 deletions(-) -- 2.8.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/2] ARM: dts: dra7x: Remove QSPI pinmux 2016-04-20 11:32 ` Vignesh R (?) @ 2016-04-20 11:32 ` Vignesh R -1 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:32 UTC (permalink / raw) To: Tony Lindgren Cc: Rob Herring, Vignesh R, nsekhar, devicetree, linux-kernel, linux-omap, linux-arm-kernel DRA7 family of processors from Texas Instruments, have a hardware module called IODELAYCONFIG Module which is expected to be configured. This block allows very specific custom fine tuning for electrical characteristics of IO pins that are necessary for functionality and device lifetime requirements. IODelay module has it's own register space with registers to configure various pins. According to AM572x TRM SPRUHZ6E October 2014–Revised January 2016[1] section 18.4.6.1 Pad Configuration, in addition to pinmuxing(MUXMODE), when operating a pad in certain mode, Virtual/Manual IO Timing Mode must also be configured to ensure that IO timings are met (DELAYMODE and MODESELECT fields of pad's IODELAYCONFIG module register). According to section 18.4.6.1.7 Isolation Requirements of above TRM, when reprogramming MUXMODE, DELAYMODE, and MODESELECT fields, there is a potential for a significant glitch on the corresponding IO. It is hence recommended to do this with I/O isolation (which can only be done in initial stages of bootloader). QSPI is one such module that requires IODELAY configuration. So, this patch removes the pinmux for QSPI for DRA74/DRA72 EVM as it needs to be done in bootloader (U-Boot) and cannot be done in kernel. Users should migrate to U-Boot v2016.05-rc1 or higher. [1] http://www.ti.com/lit/ug/spruhz6e/spruhz6e.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> --- v2: rebased on linux-next 20160419 to include moving to dra72-evm-common.dtsi arch/arm/boot/dts/dra7-evm.dts | 17 ----------------- arch/arm/boot/dts/dra72-evm-common.dtsi | 14 -------------- 2 files changed, 31 deletions(-) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index d272cf140197..47d0745a08ad 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -226,21 +226,6 @@ >; }; - qspi1_pins: pinmux_qspi1_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x344c, PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */ - DRA7XX_CORE_IOPAD(0x3450, PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */ - DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ - DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ - DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ - DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ - DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ - DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ - DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ - DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ - >; - }; - usb1_pins: pinmux_usb1_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ @@ -678,8 +663,6 @@ &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi1_pins>; spi-max-frequency = <48000000>; m25p80@0 { diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 2c880501ba2e..beef82502ea0 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -241,18 +241,6 @@ >; }; - qspi1_pins: pinmux_qspi1_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x3474, PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ - DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ - DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ - DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ - DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ - DRA7XX_CORE_IOPAD(0x3488, PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ - DRA7XX_CORE_IOPAD(0x34b8, PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ - >; - }; - hdmi_pins: pinmux_hdmi_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ @@ -692,8 +680,6 @@ &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi1_pins>; spi-max-frequency = <48000000>; m25p80@0 { -- 2.8.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 1/2] ARM: dts: dra7x: Remove QSPI pinmux @ 2016-04-20 11:32 ` Vignesh R 0 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:32 UTC (permalink / raw) To: Tony Lindgren Cc: Rob Herring, Vignesh R, nsekhar, devicetree, linux-kernel, linux-omap, linux-arm-kernel DRA7 family of processors from Texas Instruments, have a hardware module called IODELAYCONFIG Module which is expected to be configured. This block allows very specific custom fine tuning for electrical characteristics of IO pins that are necessary for functionality and device lifetime requirements. IODelay module has it's own register space with registers to configure various pins. According to AM572x TRM SPRUHZ6E October 2014–Revised January 2016[1] section 18.4.6.1 Pad Configuration, in addition to pinmuxing(MUXMODE), when operating a pad in certain mode, Virtual/Manual IO Timing Mode must also be configured to ensure that IO timings are met (DELAYMODE and MODESELECT fields of pad's IODELAYCONFIG module register). According to section 18.4.6.1.7 Isolation Requirements of above TRM, when reprogramming MUXMODE, DELAYMODE, and MODESELECT fields, there is a potential for a significant glitch on the corresponding IO. It is hence recommended to do this with I/O isolation (which can only be done in initial stages of bootloader). QSPI is one such module that requires IODELAY configuration. So, this patch removes the pinmux for QSPI for DRA74/DRA72 EVM as it needs to be done in bootloader (U-Boot) and cannot be done in kernel. Users should migrate to U-Boot v2016.05-rc1 or higher. [1] http://www.ti.com/lit/ug/spruhz6e/spruhz6e.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> --- v2: rebased on linux-next 20160419 to include moving to dra72-evm-common.dtsi arch/arm/boot/dts/dra7-evm.dts | 17 ----------------- arch/arm/boot/dts/dra72-evm-common.dtsi | 14 -------------- 2 files changed, 31 deletions(-) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index d272cf140197..47d0745a08ad 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -226,21 +226,6 @@ >; }; - qspi1_pins: pinmux_qspi1_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x344c, PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */ - DRA7XX_CORE_IOPAD(0x3450, PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */ - DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ - DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ - DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ - DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ - DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ - DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ - DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ - DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ - >; - }; - usb1_pins: pinmux_usb1_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ @@ -678,8 +663,6 @@ &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi1_pins>; spi-max-frequency = <48000000>; m25p80@0 { diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 2c880501ba2e..beef82502ea0 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -241,18 +241,6 @@ >; }; - qspi1_pins: pinmux_qspi1_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x3474, PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ - DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ - DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ - DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ - DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ - DRA7XX_CORE_IOPAD(0x3488, PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ - DRA7XX_CORE_IOPAD(0x34b8, PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ - >; - }; - hdmi_pins: pinmux_hdmi_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ @@ -692,8 +680,6 @@ &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi1_pins>; spi-max-frequency = <48000000>; m25p80@0 { -- 2.8.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 1/2] ARM: dts: dra7x: Remove QSPI pinmux @ 2016-04-20 11:32 ` Vignesh R 0 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:32 UTC (permalink / raw) To: linux-arm-kernel DRA7 family of processors from Texas Instruments, have a hardware module called IODELAYCONFIG Module which is expected to be configured. This block allows very specific custom fine tuning for electrical characteristics of IO pins that are necessary for functionality and device lifetime requirements. IODelay module has it's own register space with registers to configure various pins. According to AM572x TRM SPRUHZ6E October 2014?Revised January 2016[1] section 18.4.6.1 Pad Configuration, in addition to pinmuxing(MUXMODE), when operating a pad in certain mode, Virtual/Manual IO Timing Mode must also be configured to ensure that IO timings are met (DELAYMODE and MODESELECT fields of pad's IODELAYCONFIG module register). According to section 18.4.6.1.7 Isolation Requirements of above TRM, when reprogramming MUXMODE, DELAYMODE, and MODESELECT fields, there is a potential for a significant glitch on the corresponding IO. It is hence recommended to do this with I/O isolation (which can only be done in initial stages of bootloader). QSPI is one such module that requires IODELAY configuration. So, this patch removes the pinmux for QSPI for DRA74/DRA72 EVM as it needs to be done in bootloader (U-Boot) and cannot be done in kernel. Users should migrate to U-Boot v2016.05-rc1 or higher. [1] http://www.ti.com/lit/ug/spruhz6e/spruhz6e.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> --- v2: rebased on linux-next 20160419 to include moving to dra72-evm-common.dtsi arch/arm/boot/dts/dra7-evm.dts | 17 ----------------- arch/arm/boot/dts/dra72-evm-common.dtsi | 14 -------------- 2 files changed, 31 deletions(-) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index d272cf140197..47d0745a08ad 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -226,21 +226,6 @@ >; }; - qspi1_pins: pinmux_qspi1_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x344c, PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */ - DRA7XX_CORE_IOPAD(0x3450, PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */ - DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ - DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ - DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ - DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ - DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ - DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ - DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ - DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ - >; - }; - usb1_pins: pinmux_usb1_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ @@ -678,8 +663,6 @@ &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi1_pins>; spi-max-frequency = <48000000>; m25p80 at 0 { diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 2c880501ba2e..beef82502ea0 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -241,18 +241,6 @@ >; }; - qspi1_pins: pinmux_qspi1_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x3474, PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ - DRA7XX_CORE_IOPAD(0x3478, PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ - DRA7XX_CORE_IOPAD(0x347c, PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ - DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ - DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ - DRA7XX_CORE_IOPAD(0x3488, PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ - DRA7XX_CORE_IOPAD(0x34b8, PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ - >; - }; - hdmi_pins: pinmux_hdmi_pins { pinctrl-single,pins = < DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ @@ -692,8 +680,6 @@ &qspi { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&qspi1_pins>; spi-max-frequency = <48000000>; m25p80 at 0 { -- 2.8.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz 2016-04-20 11:32 ` Vignesh R (?) @ 2016-04-20 11:33 ` Vignesh R -1 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:33 UTC (permalink / raw) To: Tony Lindgren Cc: Rob Herring, Vignesh R, nsekhar, devicetree, linux-kernel, linux-omap, linux-arm-kernel According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> --- v2: rebased on linux-next 20160419 to include moving to dra72-evm-common.dtsi Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ arch/arm/boot/dts/dra7-evm.dts | 6 ++---- arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index cc8304aa64ac..50b14f6b53a3 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -19,6 +19,13 @@ Optional properties: - syscon-chipselects: Handle to system control region contains QSPI chipselect register and offset of that register. +NOTE: TI QSPI controller requires different pinmux and IODelay +paramaters for Mode-0 and Mode-3 operations, which needs to be set up by +the bootloader (U-Boot). Default configuration only supports Mode-0 +operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be +specified in the slave nodes of TI QSPI controller without appropriate +modification to bootloader. + Example: For am4372: diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 47d0745a08ad..507a8ec0a268 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -664,15 +664,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80@0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index beef82502ea0..e53b1ef8c7aa 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -681,15 +681,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80@0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; -- 2.8.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz @ 2016-04-20 11:33 ` Vignesh R 0 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:33 UTC (permalink / raw) To: Tony Lindgren Cc: Rob Herring, Vignesh R, nsekhar, devicetree, linux-kernel, linux-omap, linux-arm-kernel According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> --- v2: rebased on linux-next 20160419 to include moving to dra72-evm-common.dtsi Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ arch/arm/boot/dts/dra7-evm.dts | 6 ++---- arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index cc8304aa64ac..50b14f6b53a3 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -19,6 +19,13 @@ Optional properties: - syscon-chipselects: Handle to system control region contains QSPI chipselect register and offset of that register. +NOTE: TI QSPI controller requires different pinmux and IODelay +paramaters for Mode-0 and Mode-3 operations, which needs to be set up by +the bootloader (U-Boot). Default configuration only supports Mode-0 +operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be +specified in the slave nodes of TI QSPI controller without appropriate +modification to bootloader. + Example: For am4372: diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 47d0745a08ad..507a8ec0a268 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -664,15 +664,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80@0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index beef82502ea0..e53b1ef8c7aa 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -681,15 +681,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80@0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; -- 2.8.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz @ 2016-04-20 11:33 ` Vignesh R 0 siblings, 0 replies; 15+ messages in thread From: Vignesh R @ 2016-04-20 11:33 UTC (permalink / raw) To: linux-arm-kernel According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> --- v2: rebased on linux-next 20160419 to include moving to dra72-evm-common.dtsi Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ arch/arm/boot/dts/dra7-evm.dts | 6 ++---- arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index cc8304aa64ac..50b14f6b53a3 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -19,6 +19,13 @@ Optional properties: - syscon-chipselects: Handle to system control region contains QSPI chipselect register and offset of that register. +NOTE: TI QSPI controller requires different pinmux and IODelay +paramaters for Mode-0 and Mode-3 operations, which needs to be set up by +the bootloader (U-Boot). Default configuration only supports Mode-0 +operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be +specified in the slave nodes of TI QSPI controller without appropriate +modification to bootloader. + Example: For am4372: diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 47d0745a08ad..507a8ec0a268 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -664,15 +664,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80 at 0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index beef82502ea0..e53b1ef8c7aa 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -681,15 +681,13 @@ &qspi { status = "okay"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80 at 0 { compatible = "s25fl256s1"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; -- 2.8.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
[parent not found: <1461151980-28139-3-git-send-email-vigneshr-l0cyMroinI0@public.gmane.org>]
* Re: [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz 2016-04-20 11:33 ` Vignesh R (?) @ 2016-04-22 19:33 ` Rob Herring -1 siblings, 0 replies; 15+ messages in thread From: Rob Herring @ 2016-04-22 19:33 UTC (permalink / raw) To: Vignesh R Cc: Tony Lindgren, nsekhar-l0cyMroinI0, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-omap-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r On Wed, Apr 20, 2016 at 05:03:00PM +0530, Vignesh R wrote: > According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on > DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas > MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better > throughput. > > Signed-off-by: Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org> > --- > > v2: rebased on linux-next 20160419 to include moving to > dra72-evm-common.dtsi > > > Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ > arch/arm/boot/dts/dra7-evm.dts | 6 ++---- > arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- > 3 files changed, 11 insertions(+), 8 deletions(-) Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz @ 2016-04-22 19:33 ` Rob Herring 0 siblings, 0 replies; 15+ messages in thread From: Rob Herring @ 2016-04-22 19:33 UTC (permalink / raw) To: Vignesh R Cc: Tony Lindgren, nsekhar, devicetree, linux-kernel, linux-omap, linux-arm-kernel On Wed, Apr 20, 2016 at 05:03:00PM +0530, Vignesh R wrote: > According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on > DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas > MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better > throughput. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > > v2: rebased on linux-next 20160419 to include moving to > dra72-evm-common.dtsi > > > Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ > arch/arm/boot/dts/dra7-evm.dts | 6 ++---- > arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- > 3 files changed, 11 insertions(+), 8 deletions(-) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz @ 2016-04-22 19:33 ` Rob Herring 0 siblings, 0 replies; 15+ messages in thread From: Rob Herring @ 2016-04-22 19:33 UTC (permalink / raw) To: linux-arm-kernel On Wed, Apr 20, 2016 at 05:03:00PM +0530, Vignesh R wrote: > According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on > DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas > MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better > throughput. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > > v2: rebased on linux-next 20160419 to include moving to > dra72-evm-common.dtsi > > > Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ > arch/arm/boot/dts/dra7-evm.dts | 6 ++---- > arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- > 3 files changed, 11 insertions(+), 8 deletions(-) Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz 2016-04-22 19:33 ` Rob Herring (?) @ 2016-04-26 17:52 ` Tony Lindgren -1 siblings, 0 replies; 15+ messages in thread From: Tony Lindgren @ 2016-04-26 17:52 UTC (permalink / raw) To: Rob Herring Cc: Vignesh R, nsekhar-l0cyMroinI0, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-omap-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r * Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> [160422 12:35]: > On Wed, Apr 20, 2016 at 05:03:00PM +0530, Vignesh R wrote: > > According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on > > DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas > > MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better > > throughput. > > > > Signed-off-by: Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org> > > --- > > > > v2: rebased on linux-next 20160419 to include moving to > > dra72-evm-common.dtsi > > > > > > Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ > > arch/arm/boot/dts/dra7-evm.dts | 6 ++---- > > arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- > > 3 files changed, 11 insertions(+), 8 deletions(-) > > Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Applying both into omap-for-v4.7/dt thanks. Tony -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz @ 2016-04-26 17:52 ` Tony Lindgren 0 siblings, 0 replies; 15+ messages in thread From: Tony Lindgren @ 2016-04-26 17:52 UTC (permalink / raw) To: Rob Herring Cc: Vignesh R, nsekhar, devicetree, linux-kernel, linux-omap, linux-arm-kernel * Rob Herring <robh@kernel.org> [160422 12:35]: > On Wed, Apr 20, 2016 at 05:03:00PM +0530, Vignesh R wrote: > > According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on > > DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas > > MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better > > throughput. > > > > Signed-off-by: Vignesh R <vigneshr@ti.com> > > --- > > > > v2: rebased on linux-next 20160419 to include moving to > > dra72-evm-common.dtsi > > > > > > Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ > > arch/arm/boot/dts/dra7-evm.dts | 6 ++---- > > arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- > > 3 files changed, 11 insertions(+), 8 deletions(-) > > Acked-by: Rob Herring <robh@kernel.org> Applying both into omap-for-v4.7/dt thanks. Tony ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz @ 2016-04-26 17:52 ` Tony Lindgren 0 siblings, 0 replies; 15+ messages in thread From: Tony Lindgren @ 2016-04-26 17:52 UTC (permalink / raw) To: linux-arm-kernel * Rob Herring <robh@kernel.org> [160422 12:35]: > On Wed, Apr 20, 2016 at 05:03:00PM +0530, Vignesh R wrote: > > According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on > > DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas > > MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better > > throughput. > > > > Signed-off-by: Vignesh R <vigneshr@ti.com> > > --- > > > > v2: rebased on linux-next 20160419 to include moving to > > dra72-evm-common.dtsi > > > > > > Documentation/devicetree/bindings/spi/ti_qspi.txt | 7 +++++++ > > arch/arm/boot/dts/dra7-evm.dts | 6 ++---- > > arch/arm/boot/dts/dra72-evm-common.dtsi | 6 ++---- > > 3 files changed, 11 insertions(+), 8 deletions(-) > > Acked-by: Rob Herring <robh@kernel.org> Applying both into omap-for-v4.7/dt thanks. Tony ^ permalink raw reply [flat|nested] 15+ messages in thread
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2016-04-20 11:32 [PATCH v2 0/2] DRA7x: Increase QSPI frequency to 64MHz Vignesh R
2016-04-20 11:32 ` Vignesh R
2016-04-20 11:32 ` Vignesh R
2016-04-20 11:32 ` [PATCH v2 1/2] ARM: dts: dra7x: Remove QSPI pinmux Vignesh R
2016-04-20 11:32 ` Vignesh R
2016-04-20 11:32 ` Vignesh R
2016-04-20 11:33 ` [PATCH v2 2/2] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz Vignesh R
2016-04-20 11:33 ` Vignesh R
2016-04-20 11:33 ` Vignesh R
[not found] ` <1461151980-28139-3-git-send-email-vigneshr-l0cyMroinI0@public.gmane.org>
2016-04-22 19:33 ` Rob Herring
2016-04-22 19:33 ` Rob Herring
2016-04-22 19:33 ` Rob Herring
2016-04-26 17:52 ` Tony Lindgren
2016-04-26 17:52 ` Tony Lindgren
2016-04-26 17:52 ` Tony Lindgren
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