From: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Jorge Ramirez
<jorge.ramirez-ortiz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
daniel.thompson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
erin.lo-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
xiaolei.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
blogic-p3rKhJxN3npAfugRpC6u6w@public.gmane.org
Subject: Re: [PATCH v4 2/2] mtd: mediatek: driver for MTK Smart Device Gen1 NAND
Date: Tue, 10 May 2016 17:13:53 +0200 [thread overview]
Message-ID: <20160510171353.1697cb8a@bbrezillon> (raw)
In-Reply-To: <5731F537.9040009-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
On Tue, 10 May 2016 10:50:31 -0400
Jorge Ramirez <jorge.ramirez-ortiz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> On 05/10/2016 08:13 AM, Boris Brezillon wrote:
> >> + if (config->codec == ECC_ENC) {
> >> >+ /* configure ECC encoder (in bits) */
> >> >+ enc_sz = config->enc_len << 3;
> >> >+
> >> >+ reg = ecc_bit | (config->ecc_mode << ECC_MODE_SHIFT);
> >> >+ reg |= (enc_sz << ECC_MS_SHIFT);
> >> >+ writel(reg, ecc->regs + ECC_ENCCNFG);
> >> >+
> >> >+ if (config->ecc_mode != ECC_NFI_MODE)
> >> >+ writel(lower_32_bits(config->addr),
> >> >+ ecc->regs + ECC_ENCDIADDR);
> >> >+
> >> >+ } else {
> >> >+ /* configure ECC decoder (in bits) */
> >> >+ dec_sz = config->dec_len;
> >> >+
> >> >+ reg = ecc_bit | (config->ecc_mode << ECC_MODE_SHIFT);
> >> >+ reg |= (dec_sz << ECC_MS_SHIFT) | DEC_CNFG_CORRECT;
> >> >+ reg |= DEC_EMPTY_EN;
> >> >+ writel(reg, ecc->regs + ECC_DECCNFG);
> >> >+
> >> >+ if (config->sec_mask)
> >> >+ ecc->sec_mask = 1 << (config->sec_mask - 1);
> >> >+ }
> > I see that some of the logic could be shared between the ENC and DEC
> > cases.
>
> I guess you are referring to
> reg = ecc_bit | (config->ecc_mode << ECC_MODE_SHIFT);
>
> ok...
and
reg |= (sz << ECC_MS_SHIFT);
Ok, maybe it's not so important.
>
> > BTW, why do you multiply enc_len by 8 (bits to byte conversion), but
> > don't do that for dec_len?
> >
>
> just as needed by the hardware:
> the config is in bits, the encoder register requires bytes, the decoder
> register requires bits.
>
Are you sure about that? Cause it seems to me that the NAND controller
drivers put a length in bits in ->dec_len and a length in bytes in
->enc_len, and then you have an extra conversion in the ECC engine
driver code for enc_len to convert it into a value in bits.
I don't care if you decide to store this value in bytes or bits, but it
should be the same unit for both fields (and I even think we should
have a single field for both encoding and decoding mode).
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Jorge Ramirez <jorge.ramirez-ortiz@linaro.org>
Cc: computersforpeace@gmail.com, dwmw2@infradead.org,
matthias.bgg@gmail.com, robh@kernel.org,
linux-mtd@lists.infradead.org, xiaolei.li@mediatek.com,
linux-mediatek@lists.infradead.org, erin.lo@mediatek.com,
daniel.thompson@linaro.org, blogic@openwrt.org
Subject: Re: [PATCH v4 2/2] mtd: mediatek: driver for MTK Smart Device Gen1 NAND
Date: Tue, 10 May 2016 17:13:53 +0200 [thread overview]
Message-ID: <20160510171353.1697cb8a@bbrezillon> (raw)
In-Reply-To: <5731F537.9040009@linaro.org>
On Tue, 10 May 2016 10:50:31 -0400
Jorge Ramirez <jorge.ramirez-ortiz@linaro.org> wrote:
> On 05/10/2016 08:13 AM, Boris Brezillon wrote:
> >> + if (config->codec == ECC_ENC) {
> >> >+ /* configure ECC encoder (in bits) */
> >> >+ enc_sz = config->enc_len << 3;
> >> >+
> >> >+ reg = ecc_bit | (config->ecc_mode << ECC_MODE_SHIFT);
> >> >+ reg |= (enc_sz << ECC_MS_SHIFT);
> >> >+ writel(reg, ecc->regs + ECC_ENCCNFG);
> >> >+
> >> >+ if (config->ecc_mode != ECC_NFI_MODE)
> >> >+ writel(lower_32_bits(config->addr),
> >> >+ ecc->regs + ECC_ENCDIADDR);
> >> >+
> >> >+ } else {
> >> >+ /* configure ECC decoder (in bits) */
> >> >+ dec_sz = config->dec_len;
> >> >+
> >> >+ reg = ecc_bit | (config->ecc_mode << ECC_MODE_SHIFT);
> >> >+ reg |= (dec_sz << ECC_MS_SHIFT) | DEC_CNFG_CORRECT;
> >> >+ reg |= DEC_EMPTY_EN;
> >> >+ writel(reg, ecc->regs + ECC_DECCNFG);
> >> >+
> >> >+ if (config->sec_mask)
> >> >+ ecc->sec_mask = 1 << (config->sec_mask - 1);
> >> >+ }
> > I see that some of the logic could be shared between the ENC and DEC
> > cases.
>
> I guess you are referring to
> reg = ecc_bit | (config->ecc_mode << ECC_MODE_SHIFT);
>
> ok...
and
reg |= (sz << ECC_MS_SHIFT);
Ok, maybe it's not so important.
>
> > BTW, why do you multiply enc_len by 8 (bits to byte conversion), but
> > don't do that for dec_len?
> >
>
> just as needed by the hardware:
> the config is in bits, the encoder register requires bytes, the decoder
> register requires bits.
>
Are you sure about that? Cause it seems to me that the NAND controller
drivers put a length in bits in ->dec_len and a length in bytes in
->enc_len, and then you have an extra conversion in the ECC engine
driver code for enc_len to convert it into a value in bits.
I don't care if you decide to store this value in bytes or bits, but it
should be the same unit for both fields (and I even think we should
have a single field for both encoding and decoding mode).
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-05-10 15:13 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-29 16:17 [PATCH v4 0/2] MTK Smart Device Gen1 NAND Driver Jorge Ramirez-Ortiz
2016-04-29 16:17 ` Jorge Ramirez-Ortiz
[not found] ` <1461946642-1842-1-git-send-email-jorge.ramirez-ortiz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-04-29 16:17 ` [PATCH v4 1/2] mtd: mediatek: device tree docs for MTK Smart Device Gen1 NAND Jorge Ramirez-Ortiz
2016-04-29 16:17 ` Jorge Ramirez-Ortiz
[not found] ` <1461946642-1842-2-git-send-email-jorge.ramirez-ortiz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-06 13:38 ` Boris Brezillon
2016-05-06 13:38 ` Boris Brezillon
2016-05-10 11:57 ` Jorge Ramirez
2016-05-10 11:57 ` Jorge Ramirez
[not found] ` <5731CCA5.5070603-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-10 12:22 ` Boris Brezillon
2016-05-10 12:22 ` Boris Brezillon
2016-04-29 16:17 ` [PATCH v4 2/2] mtd: mediatek: driver " Jorge Ramirez-Ortiz
2016-04-29 16:17 ` Jorge Ramirez-Ortiz
[not found] ` <1461946642-1842-3-git-send-email-jorge.ramirez-ortiz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-01 7:32 ` John Crispin
2016-05-01 7:32 ` John Crispin
[not found] ` <1462165406.8414.196.camel@mhfsdcap03>
2016-05-02 6:13 ` John Crispin
2016-05-02 6:13 ` John Crispin
[not found] ` <676c2485-e176-4182-2400-201074b36ca3-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
2016-05-02 11:38 ` Jorge Ramirez
2016-05-02 11:38 ` Jorge Ramirez
[not found] ` <57273C40.6000407-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-02 17:43 ` John Crispin
2016-05-02 17:43 ` John Crispin
2016-05-10 12:13 ` Boris Brezillon
2016-05-10 12:13 ` Boris Brezillon
2016-05-10 14:37 ` Jorge Ramirez
2016-05-10 14:37 ` Jorge Ramirez
[not found] ` <5731F22C.902-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-10 14:55 ` Boris Brezillon
2016-05-10 14:55 ` Boris Brezillon
2016-05-10 14:45 ` Jorge Ramirez
2016-05-10 14:45 ` Jorge Ramirez
[not found] ` <5731F40B.801-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-10 14:59 ` Boris Brezillon
2016-05-10 14:59 ` Boris Brezillon
2016-05-10 15:18 ` Jorge Ramirez
2016-05-10 15:18 ` Jorge Ramirez
2016-05-10 14:50 ` Jorge Ramirez
2016-05-10 14:50 ` Jorge Ramirez
[not found] ` <5731F537.9040009-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-10 15:13 ` Boris Brezillon [this message]
2016-05-10 15:13 ` Boris Brezillon
2016-05-10 15:37 ` Jorge Ramirez
2016-05-10 15:37 ` Jorge Ramirez
2016-05-10 14:53 ` Jorge Ramirez
2016-05-10 14:53 ` Jorge Ramirez
[not found] ` <5731F5E3.3020607-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-10 18:14 ` Jorge Ramirez
2016-05-10 18:14 ` Jorge Ramirez
[not found] ` <573224F5.4030003-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-05-10 18:19 ` Boris Brezillon
2016-05-10 18:19 ` Boris Brezillon
2016-05-10 14:53 ` Jorge Ramirez
2016-05-10 14:53 ` Jorge Ramirez
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