From: Wei Liu <wei.liu2@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>,
Wei Liu <wei.liu2@citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH] x86: make SMEP/SMAP suppression tolerate NMI/MCE at the "wrong" time
Date: Tue, 17 May 2016 14:46:10 +0100 [thread overview]
Message-ID: <20160517134610.GS8974@citrix.com> (raw)
In-Reply-To: <573B3C2602000078000EC304@prv-mh.provo.novell.com>
On Tue, May 17, 2016 at 07:43:34AM -0600, Jan Beulich wrote:
> There is one instruction boundary where any kind of interruption would
> break the assumptions cr4_pv32_restore's debug mode checking makes on
> the correlation between the CR4 register value and its in-memory cache.
> Correct this (see the code comment) even in non-debug mode, or else
> a subsequent cr4_pv32_restore would also be misguided into thinking the
> features are enabled when they really aren't.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Release-acked-by: Wei Liu <wei.liu2@citrix.com>
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prev parent reply other threads:[~2016-05-17 13:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-17 13:43 [PATCH] x86: make SMEP/SMAP suppression tolerate NMI/MCE at the "wrong" time Jan Beulich
2016-05-17 13:45 ` Andrew Cooper
2016-05-17 13:46 ` Wei Liu [this message]
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