From: Jeff McGee <jeff.mcgee@intel.com>
To: Arun Siluvery <arun.siluvery@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/gen9: Add WaVFEStateAfterPipeControlwithMediaStateClear
Date: Fri, 3 Jun 2016 16:34:36 -0700 [thread overview]
Message-ID: <20160603233436.GA3371@jeffdesk> (raw)
In-Reply-To: <1464954000-35400-1-git-send-email-arun.siluvery@linux.intel.com>
On Fri, Jun 03, 2016 at 12:40:00PM +0100, Arun Siluvery wrote:
> Kernel only need to add a register to HW whitelist, required for a
> preemption related issue.
>
> Reference: HSD#2131039
> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e307725..1f6040a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6072,6 +6072,7 @@ enum skl_disp_power_wells {
> #define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8)
>
> #define GEN9_CS_DEBUG_MODE1 _MMIO(0x20ec)
> +#define GEN9_CTX_PREEMPT_REG _MMIO(0x2248)
> #define GEN8_CS_CHICKEN1 _MMIO(0x2580)
>
> /* GEN7 chicken */
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 8d35a39..1f9d3a4 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -987,6 +987,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
> I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
> GEN8_LQSC_FLUSH_COHERENT_LINES));
>
> + /* WaVFEStateAfterPipeControlwithMediaStateClear:skl,bxt */
> + ret= wa_ring_whitelist_reg(engine, GEN9_CTX_PREEMPT_REG);
> + if (ret)
> + return ret;
> +
> /* WaEnablePreemptionGranularityControlByUMD:skl,bxt */
> ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1);
> if (ret)
> --
> 1.9.1
>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2016-06-03 23:32 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-03 11:40 [PATCH] drm/i915/gen9: Add WaVFEStateAfterPipeControlwithMediaStateClear Arun Siluvery
2016-06-03 12:04 ` ✗ Ro.CI.BAT: failure for " Patchwork
2016-06-03 12:15 ` Patchwork
2016-06-03 23:34 ` Jeff McGee [this message]
2016-06-06 8:52 ` [RESEND_FOR_CI] " Arun Siluvery
2016-06-06 9:28 ` ✗ Ro.CI.BAT: warning for drm/i915/gen9: Add WaVFEStateAfterPipeControlwithMediaStateClear (rev2) Patchwork
2016-06-06 10:03 ` Arun Siluvery
2016-06-06 12:05 ` Tvrtko Ursulin
2017-11-01 22:44 ` [PATCH] drm/i915/gen9: Add WaVFEStateAfterPipeControlwithMediaStateClear Chris Wilson
2017-11-08 13:03 ` Joonas Lahtinen
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