From: Gavin Shan <gwshan@linux.vnet.ibm.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
Gavin Shan <gwshan@linux.vnet.ibm.com>,
linux-pci@vger.kernel.org, alistair@popple.id.au,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v10 09/18] powerpc/powernv: Extend PCI bridge resources
Date: Fri, 10 Jun 2016 16:37:58 +1000 [thread overview]
Message-ID: <20160610063758.GA6836@gwshan> (raw)
In-Reply-To: <1465537530.2948.51.camel@kernel.crashing.org>
On Fri, Jun 10, 2016 at 03:45:30PM +1000, Benjamin Herrenschmidt wrote:
>On Fri, 2016-06-10 at 15:28 +1000, Alexey Kardashevskiy wrote:
>> > Actually, it's likely caused by hardware defect
>> > - we can't set 2GB (0x80000000 - 0xffffffff) to RC's memory window.
>> > Otherwise, it *seems* the window is disabled. I tried updating the
>> > window with (0x80000000 - 0xffefffff) or (0x80000000 - 0xffdffff), no
>> > EEH error was seen. I already got 0x00001000 on read despite whatever
>> > I wrote to 0x20 reg.
>> >
>> > The hardware is broken. In order to fix this, I intend to include a
>> > bitmap for every PHB device node in skiboot. Kernel uses this to apply
>> > fixup accordingly. One bit is reserved on Garrison platform to avoid
>> > this issue. The fix can be a patch inserted before this patch in next
>> > revision
>>
>> This sounds better as preserves bisectability. Thanks.
>
>Ah yes they made those registers read-only. Look at my PHB4 code, I
>implement a cache for them in SW.
>
Ben, thanks for your confirm. Could you please share the link to
your PHB4 code? I think writing to SW cache, not going to hardware
will fix the issue.
Currently, skiboot supports emulated config regiters with help of
(struct pci_cfg_reg_filter) that was introduced for CAPI M64 BAR
issue on Garrison platform. Potentially, I can have similar thing
for 0x20 (memory window) to avoid writing to the register. However,
I need take a look on your PHB4 code to see if there is anything I
can lend. Otherwise, I will reuse the struct pci_cfg_reg_filter.
At same time, I guess the bitmap (mentioned as above) is still
needed to ensure (new kernel + old skiboot) works well, but it
depends on how much Garrison boxes have been deployed.
>Cheers,
>Ben.
>
Thanks,
Gavin
>_______________________________________________
>Linuxppc-dev mailing list
>Linuxppc-dev@lists.ozlabs.org
>https://lists.ozlabs.org/listinfo/linuxppc-dev
next prev parent reply other threads:[~2016-06-10 6:39 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-20 6:41 [PATCH v10 00/18] powerpc/powernv: PCI hotplug support Gavin Shan
2016-05-20 6:41 ` [PATCH v10 01/18] PCI: Add pcibios_setup_bridge() Gavin Shan
2016-06-21 12:27 ` [v10,01/18] " Michael Ellerman
2016-05-20 6:41 ` [PATCH v10 02/18] powerpc/pci: Override pcibios_setup_bridge() Gavin Shan
2016-05-20 6:41 ` [PATCH v10 03/18] powerpc/powernv: Remove PCI_RESET_DELAY_US Gavin Shan
2016-06-01 2:35 ` Andrew Donnellan
2016-06-01 2:35 ` Andrew Donnellan
2016-05-20 6:41 ` [PATCH v10 04/18] powerpc/powernv: Move pnv_pci_ioda_setup_opal_tce_kill() around Gavin Shan
2016-05-20 6:41 ` [PATCH v10 05/18] powerpc/powernv: Increase PE# capacity Gavin Shan
2016-05-20 6:41 ` [PATCH v10 06/18] powerpc/powernv: Allocate PE# in reverse order Gavin Shan
2016-05-20 6:41 ` [PATCH v10 07/18] powerpc/powernv: Create PEs in pcibios_setup_bridge() Gavin Shan
2016-05-20 6:41 ` [PATCH v10 08/18] powerpc/powernv: Setup PE for root bus Gavin Shan
2016-05-20 6:41 ` [PATCH v10 09/18] powerpc/powernv: Extend PCI bridge resources Gavin Shan
2016-06-08 3:47 ` Alexey Kardashevskiy
2016-06-10 4:33 ` Gavin Shan
2016-06-10 5:28 ` Alexey Kardashevskiy
2016-06-10 5:45 ` Benjamin Herrenschmidt
2016-06-10 6:37 ` Gavin Shan [this message]
2016-05-20 6:41 ` [PATCH v10 10/18] powerpc/powernv: Make pnv_ioda_deconfigure_pe() visible Gavin Shan
2016-05-20 6:41 ` [PATCH v10 11/18] powerpc/powernv: Dynamically release PE Gavin Shan
2016-05-20 6:41 ` [PATCH v10 12/18] powerpc/pci: Update bridge windows on PCI plug Gavin Shan
2016-05-20 6:41 ` [PATCH v10 13/18] powerpc/pci: Delay populating pdn Gavin Shan
2016-06-23 0:59 ` Daniel Axtens
2016-06-23 1:34 ` Gavin Shan
2016-05-20 6:41 ` [PATCH v10 14/18] powerpc/powernv: Support PCI slot ID Gavin Shan
2016-05-20 6:41 ` [PATCH v10 15/18] powerpc/powernv: Use PCI slot reset infrastructure Gavin Shan
2016-05-20 6:41 ` [PATCH v10 16/18] powerpc/powernv: Introduce pnv_pci_get_slot_id() Gavin Shan
2016-05-20 6:41 ` [PATCH v10 17/18] powerpc/powernv: Functions to get/set PCI slot state Gavin Shan
2016-06-17 10:32 ` [v10,17/18] " Michael Ellerman
2016-06-18 3:18 ` Gavin Shan
2016-05-20 6:41 ` [PATCH v10 18/18] PCI/hotplug: PowerPC PowerNV PCI hotplug driver Gavin Shan
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