diff for duplicates of <20160612133041.GA3709@rithvik-IdeaPad> diff --git a/a/1.txt b/N1/1.txt index 8c7dcad..28d7982 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -32,7 +32,7 @@ index f80ee77..8cb5cb9 100644 - /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ +/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ - if (getChipType() = SM750LE) + if (getChipType() == SM750LE) return; if (frequency) { @@ -51,7 +51,7 @@ index f80ee77..8cb5cb9 100644 - /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ +/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */ - if (getChipType() = SM750LE) + if (getChipType() == SM750LE) return; if (frequency) { @@ -76,7 +76,7 @@ index f80ee77..8cb5cb9 100644 + * in SM750, the system might hang when sw accesses the memory.The + * memory should be resetted after changing the MXCLK. */ - if (pInitParam->resetMemory = 1) { + if (pInitParam->resetMemory == 1) { reg = PEEK32(MISC_CTRL); @@ -282,24 +287,23 @@ int ddk750_initHw(initchip_param_t *pInitParam) } @@ -120,7 +120,7 @@ index f80ee77..8cb5cb9 100644 unsigned int RN, quo, rem, fl_quo; @@ -310,7 +314,8 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) - if (getChipType() = SM750LE) { + if (getChipType() == SM750LE) { /* SM750LE don't have prgrammable PLL and M/N values to work on. - Just return the requested clock. */ + * Just return the requested clock. @@ -134,7 +134,7 @@ index f80ee77..8cb5cb9 100644 - /* for MXCLK register , no POD provided, so need be treated differently */ +/* for MXCLK register , no POD provided, so need be treated differently */ - if (pll->clockType = MXCLK_PLL) + if (pll->clockType == MXCLK_PLL) max_d = 3; for (N = 15; N > 1; N--) { diff --git a/a/content_digest b/N1/content_digest index 6ca083c..8924a62 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,6 +1,6 @@ "From\0Rithvik Patibandla <rithvikp98@gmail.com>\0" "Subject\0[PATCH] Staging:sm750fb:ddk750_chip.c:Fixed coding style in comments\0" - "Date\0Sun, 12 Jun 2016 13:42:41 +0000\0" + "Date\0Sun, 12 Jun 2016 19:00:41 +0530\0" "To\0sudipm.mukherjee@gmail.com\0" "Cc\0teddy.wang@siliconmotion.com" gregkh@linuxfoundation.org @@ -43,7 +43,7 @@ " \n" "-\t/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */\n" "+/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */\n" - " \tif (getChipType() = SM750LE)\n" + " \tif (getChipType() == SM750LE)\n" " \t\treturn;\n" " \n" " \tif (frequency) {\n" @@ -62,7 +62,7 @@ " \n" "-\t/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */\n" "+/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */\n" - " \tif (getChipType() = SM750LE)\n" + " \tif (getChipType() == SM750LE)\n" " \t\treturn;\n" " \n" " \tif (frequency) {\n" @@ -87,7 +87,7 @@ "+\t * in SM750, the system might hang when sw accesses the memory.The\n" "+\t * memory should be resetted after changing the MXCLK.\n" " \t */\n" - " \tif (pInitParam->resetMemory = 1) {\n" + " \tif (pInitParam->resetMemory == 1) {\n" " \t\treg = PEEK32(MISC_CTRL);\n" "@@ -282,24 +287,23 @@ int ddk750_initHw(initchip_param_t *pInitParam)\n" " }\n" @@ -131,7 +131,7 @@ " \tunsigned int RN, quo, rem, fl_quo;\n" "@@ -310,7 +314,8 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)\n" " \n" - " \tif (getChipType() = SM750LE) {\n" + " \tif (getChipType() == SM750LE) {\n" " \t\t/* SM750LE don't have prgrammable PLL and M/N values to work on.\n" "-\t\tJust return the requested clock. */\n" "+\t\t * Just return the requested clock.\n" @@ -145,7 +145,7 @@ " \n" "-\t/* for MXCLK register , no POD provided, so need be treated differently\t*/\n" "+/* for MXCLK register , no POD provided, so need be treated differently\t*/\n" - " \tif (pll->clockType = MXCLK_PLL)\n" + " \tif (pll->clockType == MXCLK_PLL)\n" " \t\tmax_d = 3;\n" " \n" " \tfor (N = 15; N > 1; N--) {\n" @@ -157,4 +157,4 @@ "-- \n" 2.7.4 -eae8ef3967342d1335db78d1dff848da8eb8b0324259368032c763d0af4eeff0 +f33ae4e88c0b78deee501123dcbf3b299a30849ad4fb2bbc5a9ce54dfb17bfb3
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