Re: [PATCH v2 0/3] pinctrl: cherryview: fixes and enhancements

[Mika Westerberg <mika.westerberg@linux.intel.com>]

On Fri, Jun 10, 2016 at 01:23:33PM +0100, Dan O'Donovan wrote:
> This series includes a number of fixes and enhancements for the
> Cherryview pinctrl/gpio driver, developed during integration on the
> UP Board (based on the Intel X5-Z8350 "Cherry Trail" Atom SoC).
> 
> Patch 1 provides a workaround for a documented silicon bug which
> causes data corruption of concurrent accesses to the GPIO controller
> registers on this SoC.
> 
> The other patches implement additional pin config functions/options
> for this driver.
> 
> Changes since v1:
>  * Addressed review comments from Mika Westerberg:
>    - Drop clean-up of checkpatch warnings (impacts back-porting)
>    - Re-order series to put fixes ahead of enhancements
>    - Rename a variable
>    - Tag concurrency fix (patch 1) for stable
>    - Drop fix restoring PADCTRL1 bits when GPIO disabled (rejected)
> 
> Dan O'Donovan (3):
>   pinctrl: cherryview: prevent concurrent access to GPIO controllers
>   pinctrl: cherryview: add option to set open-drain pin config
>   pinctrl: cherryview: add handlers for pin_config_group_get/set

Looks good to me now, thanks.

For the whole series,

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>