From mboxrd@z Thu Jan 1 00:00:00 1970 From: linux@armlinux.org.uk (Russell King - ARM Linux) Date: Mon, 13 Jun 2016 18:21:40 +0100 Subject: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs In-Reply-To: <1465837689-28215-1-git-send-email-suzuki.poulose@arm.com> References: <1465837689-28215-1-git-send-email-suzuki.poulose@arm.com> Message-ID: <20160613172140.GY1041@n2100.armlinux.org.uk> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Jun 13, 2016 at 06:08:09PM +0100, Suzuki K Poulose wrote: > From: Steve Capper > > It can be useful for JIT software to be aware of MIDR_EL1 and > REVIDR_EL1 to ascertain the presence of any core errata that could > affect codegen. > > This patch exposes these registers through sysfs: > > /sys/devices/system/cpu/cpu$ID/identification/midr > /sys/devices/system/cpu/cpu$ID/identification/revidr > > where $ID is the cpu number. For big.LITTLE systems, one can have a > mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need > to be enumerated. > > If the kernel does not have valid information to populate these entries > with, an empty string is returned to userspace. So there's no confusion, I've historically said no on 32-bit ARM to exposing the MIDR to userspace, and my position on that for 32-bit ARM has not changed. -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933672AbcFMRVu (ORCPT ); Mon, 13 Jun 2016 13:21:50 -0400 Received: from pandora.armlinux.org.uk ([78.32.30.218]:46781 "EHLO pandora.armlinux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932111AbcFMRVt (ORCPT ); Mon, 13 Jun 2016 13:21:49 -0400 Date: Mon, 13 Jun 2016 18:21:40 +0100 From: Russell King - ARM Linux To: Suzuki K Poulose Cc: catalin.marinas@arm.com, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, steve.capper@arm.com, Steve Capper , Mark Rutland Subject: Re: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Message-ID: <20160613172140.GY1041@n2100.armlinux.org.uk> References: <1465837689-28215-1-git-send-email-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1465837689-28215-1-git-send-email-suzuki.poulose@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jun 13, 2016 at 06:08:09PM +0100, Suzuki K Poulose wrote: > From: Steve Capper > > It can be useful for JIT software to be aware of MIDR_EL1 and > REVIDR_EL1 to ascertain the presence of any core errata that could > affect codegen. > > This patch exposes these registers through sysfs: > > /sys/devices/system/cpu/cpu$ID/identification/midr > /sys/devices/system/cpu/cpu$ID/identification/revidr > > where $ID is the cpu number. For big.LITTLE systems, one can have a > mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need > to be enumerated. > > If the kernel does not have valid information to populate these entries > with, an empty string is returned to userspace. So there's no confusion, I've historically said no on 32-bit ARM to exposing the MIDR to userspace, and my position on that for 32-bit ARM has not changed. -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net.