From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52414) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCcdm-0006Cs-U3 for qemu-devel@nongnu.org; Mon, 13 Jun 2016 20:55:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bCcdk-0000AT-7h for qemu-devel@nongnu.org; Mon, 13 Jun 2016 20:55:37 -0400 Date: Tue, 14 Jun 2016 10:43:37 +1000 From: David Gibson Message-ID: <20160614004337.GC4882@voom.fritz.box> References: <1465583197-3415-1-git-send-email-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="5QAgd0e35j3NYeGe" Content-Disposition: inline In-Reply-To: <1465583197-3415-1-git-send-email-mark.cave-ayland@ilande.co.uk> Subject: Re: [Qemu-devel] [PATCH] macio: call dma_memory_unmap() at the end of each DMA transfer List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mark Cave-Ayland Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, aurelien@aurel32.net --5QAgd0e35j3NYeGe Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jun 10, 2016 at 07:26:37PM +0100, Mark Cave-Ayland wrote: > This ensures that the underlying memory is marked dirty once the transfer > is complete and resolves cache coherency problems under MacOS 9. >=20 > Signed-off-by: Mark Cave-Ayland Applied to ppc-for-2.7, thanks. > --- > hw/ide/macio.c | 46 +++++++++++++++++++++++++-------------= ------ > include/hw/ppc/mac_dbdma.h | 5 +++++ > 2 files changed, 31 insertions(+), 20 deletions(-) >=20 > diff --git a/hw/ide/macio.c b/hw/ide/macio.c > index 78c10a0..fa57352 100644 > --- a/hw/ide/macio.c > +++ b/hw/ide/macio.c > @@ -66,8 +66,7 @@ static void pmac_dma_read(BlockBackend *blk, > DBDMA_io *io =3D opaque; > MACIOIDEState *m =3D io->opaque; > IDEState *s =3D idebus_active_if(&m->bus); > - dma_addr_t dma_addr, dma_len; > - void *mem; > + dma_addr_t dma_addr; > int64_t sector_num; > int nsector; > uint64_t align =3D BDRV_SECTOR_SIZE; > @@ -84,9 +83,10 @@ static void pmac_dma_read(BlockBackend *blk, > sector_num, nsector); > =20 > dma_addr =3D io->addr; > - dma_len =3D io->len; > - mem =3D dma_memory_map(&address_space_memory, dma_addr, &dma_len, > - DMA_DIRECTION_FROM_DEVICE); > + io->dir =3D DMA_DIRECTION_FROM_DEVICE; > + io->dma_len =3D io->len; > + io->dma_mem =3D dma_memory_map(&address_space_memory, dma_addr, &io-= >dma_len, > + io->dir); > =20 > if (offset & (align - 1)) { > head_bytes =3D offset & (align - 1); > @@ -100,7 +100,7 @@ static void pmac_dma_read(BlockBackend *blk, > offset =3D offset & ~(align - 1); > } > =20 > - qemu_iovec_add(&io->iov, mem, io->len); > + qemu_iovec_add(&io->iov, io->dma_mem, io->len); > =20 > if ((offset + bytes) & (align - 1)) { > tail_bytes =3D (offset + bytes) & (align - 1); > @@ -130,8 +130,7 @@ static void pmac_dma_write(BlockBackend *blk, > DBDMA_io *io =3D opaque; > MACIOIDEState *m =3D io->opaque; > IDEState *s =3D idebus_active_if(&m->bus); > - dma_addr_t dma_addr, dma_len; > - void *mem; > + dma_addr_t dma_addr; > int64_t sector_num; > int nsector; > uint64_t align =3D BDRV_SECTOR_SIZE; > @@ -149,9 +148,10 @@ static void pmac_dma_write(BlockBackend *blk, > sector_num, nsector); > =20 > dma_addr =3D io->addr; > - dma_len =3D io->len; > - mem =3D dma_memory_map(&address_space_memory, dma_addr, &dma_len, > - DMA_DIRECTION_TO_DEVICE); > + io->dir =3D DMA_DIRECTION_TO_DEVICE; > + io->dma_len =3D io->len; > + io->dma_mem =3D dma_memory_map(&address_space_memory, dma_addr, &io-= >dma_len, > + io->dir); > =20 > if (offset & (align - 1)) { > head_bytes =3D offset & (align - 1); > @@ -163,7 +163,7 @@ static void pmac_dma_write(BlockBackend *blk, > blk_pread(s->blk, (sector_num << 9), &io->head_remainder, align); > =20 > qemu_iovec_add(&io->iov, &io->head_remainder, head_bytes); > - qemu_iovec_add(&io->iov, mem, io->len); > + qemu_iovec_add(&io->iov, io->dma_mem, io->len); > =20 > bytes +=3D offset & (align - 1); > offset =3D offset & ~(align - 1); > @@ -181,7 +181,7 @@ static void pmac_dma_write(BlockBackend *blk, > blk_pread(s->blk, (sector_num << 9), &io->tail_remainder, align); > =20 > if (!unaligned_head) { > - qemu_iovec_add(&io->iov, mem, io->len); > + qemu_iovec_add(&io->iov, io->dma_mem, io->len); > } > =20 > qemu_iovec_add(&io->iov, &io->tail_remainder + tail_bytes, > @@ -193,7 +193,7 @@ static void pmac_dma_write(BlockBackend *blk, > } > =20 > if (!unaligned_head && !unaligned_tail) { > - qemu_iovec_add(&io->iov, mem, io->len); > + qemu_iovec_add(&io->iov, io->dma_mem, io->len); > } > =20 > s->io_buffer_size -=3D io->len; > @@ -214,18 +214,18 @@ static void pmac_dma_trim(BlockBackend *blk, > DBDMA_io *io =3D opaque; > MACIOIDEState *m =3D io->opaque; > IDEState *s =3D idebus_active_if(&m->bus); > - dma_addr_t dma_addr, dma_len; > - void *mem; > + dma_addr_t dma_addr; > =20 > qemu_iovec_destroy(&io->iov); > qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1); > =20 > dma_addr =3D io->addr; > - dma_len =3D io->len; > - mem =3D dma_memory_map(&address_space_memory, dma_addr, &dma_len, > - DMA_DIRECTION_TO_DEVICE); > + io->dir =3D DMA_DIRECTION_TO_DEVICE; > + io->dma_len =3D io->len; > + io->dma_mem =3D dma_memory_map(&address_space_memory, dma_addr, &io-= >dma_len, > + io->dir); > =20 > - qemu_iovec_add(&io->iov, mem, io->len); > + qemu_iovec_add(&io->iov, io->dma_mem, io->len); > s->io_buffer_size -=3D io->len; > s->io_buffer_index +=3D io->len; > io->len =3D 0; > @@ -285,6 +285,9 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, = int ret) > return; > =20 > done: > + dma_memory_unmap(&address_space_memory, io->dma_mem, io->dma_len, > + io->dir, io->dma_len); > + > if (ret < 0) { > block_acct_failed(blk_get_stats(s->blk), &s->acct); > } else { > @@ -351,6 +354,9 @@ static void pmac_ide_transfer_cb(void *opaque, int re= t) > return; > =20 > done: > + dma_memory_unmap(&address_space_memory, io->dma_mem, io->dma_len, > + io->dir, io->dma_len); > + > if (s->dma_cmd =3D=3D IDE_DMA_READ || s->dma_cmd =3D=3D IDE_DMA_WRIT= E) { > if (ret < 0) { > block_acct_failed(blk_get_stats(s->blk), &s->acct); > diff --git a/include/hw/ppc/mac_dbdma.h b/include/hw/ppc/mac_dbdma.h > index 0cce4e8..d15a6cc 100644 > --- a/include/hw/ppc/mac_dbdma.h > +++ b/include/hw/ppc/mac_dbdma.h > @@ -24,6 +24,7 @@ > =20 > #include "exec/memory.h" > #include "qemu/iov.h" > +#include "sysemu/dma.h" > =20 > typedef struct DBDMA_io DBDMA_io; > =20 > @@ -44,6 +45,10 @@ struct DBDMA_io { > uint8_t head_remainder[0x200]; > uint8_t tail_remainder[0x200]; > QEMUIOVector iov; > + /* DMA request */ > + void *dma_mem; > + dma_addr_t dma_len; > + DMADirection dir; > }; > =20 > /* --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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