Re: [PATCH] drm/i915/guc: make forwarding of VBlanks conditional

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Fri, Jun 17, 2016 at 02:42:39PM +0100, Dave Gordon wrote:
> Apparently we shouldn't forward VBlanks to the GuC unconditionally,
> as it may trigger a race condition in the GuC's internal dispatcher.
> 
> From an internal message from Harsh Chheda <harsh.j.chheda@intel.com>
> >
> > If the context has switched out the [GuC] scheduler should know so
> > that it can  put the context in wait state and schedule something
> > else.  If the context which is waiting on Vblank is still on the CS
> > then [the GuC] scheduler does not need to know. If in this case wait
> > on Vblank is sent to Guc while the context is still on CS there is
> > an edge condition when the Vblank may get satisfied right after
> > sending interrupt to guc and context may complete. Scheduler will
> > then incorrectly mark the context to be in wait state.
> 
> So we need to change this register setting to GFX_FORWARD_VBLANK_COND.

No one has ever managed to explain why the guc needs to get vblanks
in the first place. The original commit message adding this stuff is
not helpful at all.

> 
> Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
> Cc: Harsh Chheda <harsh.j.chheda@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 8fe96a2..af9f51e 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -106,7 +106,7 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
>  	u32 tmp;
>  
>  	/* tell all command streamers to forward interrupts and vblank to GuC */
> -	irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_ALWAYS);
> +	irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_COND);
>  	irqs |= _MASKED_BIT_ENABLE(GFX_INTERRUPT_STEERING);
>  	for_each_engine(engine, dev_priv)
>  		I915_WRITE(RING_MODE_GEN7(engine), irqs);
> -- 
> 1.9.1
> 
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-- 
Ville Syrjälä
Intel OTC
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