From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Mackerras Date: Mon, 20 Jun 2016 05:18:53 +0000 Subject: Re: [PATCH v3 2/2] KVM: PPC: Exit guest upon MCE when FWNMI capability is enabled Message-Id: <20160620051853.GA29366@fergus.ozlabs.ibm.com> List-Id: References: <20160113070759.20248.86252.stgit@aravindap> <20160113070809.20248.80811.stgit@aravindap> In-Reply-To: <20160113070809.20248.80811.stgit@aravindap> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Aravinda Prasad Cc: kvm@vger.kernel.org, gleb@kernel.org, mahesh@linux.vnet.ibm.com, agraf@suse.de, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org, pbonzini@redhat.com, david@gibson.dropbear.id.au Hi Aravinda, On Wed, Jan 13, 2016 at 12:38:09PM +0530, Aravinda Prasad wrote: > Enhance KVM to cause a guest exit with KVM_EXIT_NMI > exit reasons upon a machine check exception (MCE) in > the guest address space if the KVM_CAP_PPC_FWNMI > capability is enabled (instead of delivering 0x200 > interrupt to guest). This enables QEMU to build error > log and deliver machine check exception to guest via > guest registered machine check handler. > > This approach simplifies the delivering of machine > check exception to guest OS compared to the earlier > approach of KVM directly invoking 0x200 guest interrupt > vector. In the earlier approach QEMU was enhanced to > patch the 0x200 interrupt vector during boot. The > patched code at 0x200 issued a private hcall to pass > the control to QEMU to build the error log. > > This design/approach is based on the feedback for the > QEMU patches to handle machine check exception. Details > of earlier approach of handling machine check exception > in QEMU and related discussions can be found at: > > https://lists.nongnu.org/archive/html/qemu-devel/2014-11/msg00813.html > > Signed-off-by: Aravinda Prasad Are you in the process of doing a new version of this patch with the requested changes? Paul. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rXzfp11rZzDq5d for ; Mon, 20 Jun 2016 15:18:58 +1000 (AEST) Date: Mon, 20 Jun 2016 15:18:53 +1000 From: Paul Mackerras To: Aravinda Prasad Cc: gleb@kernel.org, agraf@suse.de, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org, pbonzini@redhat.com, mahesh@linux.vnet.ibm.com, david@gibson.dropbear.id.au, kvm@vger.kernel.org, mpe@ellerman.id.au Subject: Re: [PATCH v3 2/2] KVM: PPC: Exit guest upon MCE when FWNMI capability is enabled Message-ID: <20160620051853.GA29366@fergus.ozlabs.ibm.com> References: <20160113070759.20248.86252.stgit@aravindap> <20160113070809.20248.80811.stgit@aravindap> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20160113070809.20248.80811.stgit@aravindap> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi Aravinda, On Wed, Jan 13, 2016 at 12:38:09PM +0530, Aravinda Prasad wrote: > Enhance KVM to cause a guest exit with KVM_EXIT_NMI > exit reasons upon a machine check exception (MCE) in > the guest address space if the KVM_CAP_PPC_FWNMI > capability is enabled (instead of delivering 0x200 > interrupt to guest). This enables QEMU to build error > log and deliver machine check exception to guest via > guest registered machine check handler. > > This approach simplifies the delivering of machine > check exception to guest OS compared to the earlier > approach of KVM directly invoking 0x200 guest interrupt > vector. In the earlier approach QEMU was enhanced to > patch the 0x200 interrupt vector during boot. The > patched code at 0x200 issued a private hcall to pass > the control to QEMU to build the error log. > > This design/approach is based on the feedback for the > QEMU patches to handle machine check exception. Details > of earlier approach of handling machine check exception > in QEMU and related discussions can be found at: > > https://lists.nongnu.org/archive/html/qemu-devel/2014-11/msg00813.html > > Signed-off-by: Aravinda Prasad Are you in the process of doing a new version of this patch with the requested changes? Paul. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Mackerras Subject: Re: [PATCH v3 2/2] KVM: PPC: Exit guest upon MCE when FWNMI capability is enabled Date: Mon, 20 Jun 2016 15:18:53 +1000 Message-ID: <20160620051853.GA29366@fergus.ozlabs.ibm.com> References: <20160113070759.20248.86252.stgit@aravindap> <20160113070809.20248.80811.stgit@aravindap> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: kvm@vger.kernel.org, gleb@kernel.org, mahesh@linux.vnet.ibm.com, agraf@suse.de, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org, pbonzini@redhat.com, david@gibson.dropbear.id.au To: Aravinda Prasad Return-path: Content-Disposition: inline In-Reply-To: <20160113070809.20248.80811.stgit@aravindap> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+glppe-linuxppc-embedded-2=m.gmane.org@lists.ozlabs.org Sender: "Linuxppc-dev" List-Id: kvm.vger.kernel.org SGkgQXJhdmluZGEsCgpPbiBXZWQsIEphbiAxMywgMjAxNiBhdCAxMjozODowOVBNICswNTMwLCBB cmF2aW5kYSBQcmFzYWQgd3JvdGU6Cj4gRW5oYW5jZSBLVk0gdG8gY2F1c2UgYSBndWVzdCBleGl0 IHdpdGggS1ZNX0VYSVRfTk1JCj4gZXhpdCByZWFzb25zIHVwb24gYSBtYWNoaW5lIGNoZWNrIGV4 Y2VwdGlvbiAoTUNFKSBpbgo+IHRoZSBndWVzdCBhZGRyZXNzIHNwYWNlIGlmIHRoZSBLVk1fQ0FQ X1BQQ19GV05NSQo+IGNhcGFiaWxpdHkgaXMgZW5hYmxlZCAoaW5zdGVhZCBvZiBkZWxpdmVyaW5n IDB4MjAwCj4gaW50ZXJydXB0IHRvIGd1ZXN0KS4gVGhpcyBlbmFibGVzIFFFTVUgdG8gYnVpbGQg ZXJyb3IKPiBsb2cgYW5kIGRlbGl2ZXIgbWFjaGluZSBjaGVjayBleGNlcHRpb24gdG8gZ3Vlc3Qg dmlhCj4gZ3Vlc3QgcmVnaXN0ZXJlZCBtYWNoaW5lIGNoZWNrIGhhbmRsZXIuCj4gCj4gVGhpcyBh cHByb2FjaCBzaW1wbGlmaWVzIHRoZSBkZWxpdmVyaW5nIG9mIG1hY2hpbmUKPiBjaGVjayBleGNl cHRpb24gdG8gZ3Vlc3QgT1MgY29tcGFyZWQgdG8gdGhlIGVhcmxpZXIKPiBhcHByb2FjaCBvZiBL Vk0gZGlyZWN0bHkgaW52b2tpbmcgMHgyMDAgZ3Vlc3QgaW50ZXJydXB0Cj4gdmVjdG9yLiBJbiB0 aGUgZWFybGllciBhcHByb2FjaCBRRU1VIHdhcyBlbmhhbmNlZCB0bwo+IHBhdGNoIHRoZSAweDIw MCBpbnRlcnJ1cHQgdmVjdG9yIGR1cmluZyBib290LiBUaGUKPiBwYXRjaGVkIGNvZGUgYXQgMHgy MDAgaXNzdWVkIGEgcHJpdmF0ZSBoY2FsbCB0byBwYXNzCj4gdGhlIGNvbnRyb2wgdG8gUUVNVSB0 byBidWlsZCB0aGUgZXJyb3IgbG9nLgo+IAo+IFRoaXMgZGVzaWduL2FwcHJvYWNoIGlzIGJhc2Vk IG9uIHRoZSBmZWVkYmFjayBmb3IgdGhlCj4gUUVNVSBwYXRjaGVzIHRvIGhhbmRsZSBtYWNoaW5l IGNoZWNrIGV4Y2VwdGlvbi4gRGV0YWlscwo+IG9mIGVhcmxpZXIgYXBwcm9hY2ggb2YgaGFuZGxp bmcgbWFjaGluZSBjaGVjayBleGNlcHRpb24KPiBpbiBRRU1VIGFuZCByZWxhdGVkIGRpc2N1c3Np b25zIGNhbiBiZSBmb3VuZCBhdDoKPiAKPiBodHRwczovL2xpc3RzLm5vbmdudS5vcmcvYXJjaGl2 ZS9odG1sL3FlbXUtZGV2ZWwvMjAxNC0xMS9tc2cwMDgxMy5odG1sCj4gCj4gU2lnbmVkLW9mZi1i eTogQXJhdmluZGEgUHJhc2FkIDxhcmF2aW5kYUBsaW51eC52bmV0LmlibS5jb20+CgpBcmUgeW91 IGluIHRoZSBwcm9jZXNzIG9mIGRvaW5nIGEgbmV3IHZlcnNpb24gb2YgdGhpcyBwYXRjaCB3aXRo IHRoZQpyZXF1ZXN0ZWQgY2hhbmdlcz8KClBhdWwuCl9fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fCkxpbnV4cHBjLWRldiBtYWlsaW5nIGxpc3QKTGludXhwcGMt ZGV2QGxpc3RzLm96bGFicy5vcmcKaHR0cHM6Ly9saXN0cy5vemxhYnMub3JnL2xpc3RpbmZvL2xp bnV4cHBjLWRldg==