From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pa0-f41.google.com ([209.85.220.41]:35077 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750912AbcGMCG3 (ORCPT ); Tue, 12 Jul 2016 22:06:29 -0400 Received: by mail-pa0-f41.google.com with SMTP id dx3so12426786pab.2 for ; Tue, 12 Jul 2016 19:06:23 -0700 (PDT) Date: Tue, 12 Jul 2016 19:05:31 -0700 From: Brian Norris To: Shawn Lin Cc: devicetree@vger.kernel.org, Heiko Stuebner , Arnd Bergmann , Marc Zyngier , linux-pci@vger.kernel.org, Wenrui Li , linux-kernel@vger.kernel.org, Doug Anderson , linux-rockchip@lists.infradead.org, Rob Herring , Bjorn Helgaas Subject: Re: [PATCH v6 1/2] Documentation: bindings: add dt doc for Rockchip PCIe controller Message-ID: <20160713020531.GA14833@google.com> References: <1467789398-13501-1-git-send-email-shawn.lin@rock-chips.com> <20160707003912.GB100467@google.com> <59b328c9-3a21-36fa-7f28-4ba24d77fef0@rock-chips.com> <20160713013117.GA130126@google.com> <95a7ffdd-becc-bb3f-c026-d07c691b7a53@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 In-Reply-To: <95a7ffdd-becc-bb3f-c026-d07c691b7a53@rock-chips.com> Sender: linux-pci-owner@vger.kernel.org List-ID: Hi, On Wed, Jul 13, 2016 at 09:45:43AM +0800, Shawn Lin wrote: > 在 2016/7/13 9:31, Brian Norris 写道: > >On Wed, Jul 13, 2016 at 09:10:15AM +0800, Shawn Lin wrote: > >At some level, it's a matter of preference. But when you're talking > >about the rk3399 PCIe "interrupt controller" domain, it seems that you > >should be talking about HW bits in the controller -- i.e., you have a > >4-bit interrupt status bitfield, that we typically call [0:3]. If you > >use [1:4], then you have to remember to subtract 1 mentally when mapping > >to the actual HW bit. I believe that confusion (since bitfields normally > >count from 0) might have helped cause the infinite loop bug I noticed > >too. And I also think that counting from 0 helps clarify the fact that > >your interrupt controller indexing is an independent numbering from the > >PCI interrupt numbering, even though they happen to map 1:1. > > If that's the fact of how we should numbering our index base, we should > probably start if from 5 as the layout of INTx is > PCIE_CLIENT_INT_STATUS[5:8]... ? Possibly better than starting from 1, but IMO also doesn't make sense, because the other bits aren't interrupts you want to translate on behalf of other devices (are they?) -- they're interrupt bits consumed by the host controller itself. (If they are possibly needed for translation, then sure, index the entire status register and handle it in the driver, and start the INTx mapping from 5 here.) [...] > >If you still think it makes more sense to count from 1, then I won't > >stop you. > > I don't have a hard opinion for the index base as I think it's trivial. It's simple, but I think it influenced code understanding and bugginess. > So if it's more sensible to you, I will apply your suggestion. Well, I was just offering my opinion. I think it makes more sense, but maybe it doesn't to you. Brian From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brian Norris Subject: Re: [PATCH v6 1/2] Documentation: bindings: add dt doc for Rockchip PCIe controller Date: Tue, 12 Jul 2016 19:05:31 -0700 Message-ID: <20160713020531.GA14833@google.com> References: <1467789398-13501-1-git-send-email-shawn.lin@rock-chips.com> <20160707003912.GB100467@google.com> <59b328c9-3a21-36fa-7f28-4ba24d77fef0@rock-chips.com> <20160713013117.GA130126@google.com> <95a7ffdd-becc-bb3f-c026-d07c691b7a53@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <95a7ffdd-becc-bb3f-c026-d07c691b7a53-TNX95d0MmH7DzftRWevZcw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Shawn Lin Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Heiko Stuebner , Arnd Bergmann , Marc Zyngier , linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Wenrui Li , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Doug Anderson , linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Rob Herring , Bjorn Helgaas List-Id: linux-rockchip.vger.kernel.org SGksCgpPbiBXZWQsIEp1bCAxMywgMjAxNiBhdCAwOTo0NTo0M0FNICswODAwLCBTaGF3biBMaW4g d3JvdGU6Cj4g5ZyoIDIwMTYvNy8xMyA5OjMxLCBCcmlhbiBOb3JyaXMg5YaZ6YGTOgo+ID5PbiBX ZWQsIEp1bCAxMywgMjAxNiBhdCAwOToxMDoxNUFNICswODAwLCBTaGF3biBMaW4gd3JvdGU6Cj4g PkF0IHNvbWUgbGV2ZWwsIGl0J3MgYSBtYXR0ZXIgb2YgcHJlZmVyZW5jZS4gQnV0IHdoZW4geW91 J3JlIHRhbGtpbmcKPiA+YWJvdXQgdGhlIHJrMzM5OSBQQ0llICJpbnRlcnJ1cHQgY29udHJvbGxl ciIgZG9tYWluLCBpdCBzZWVtcyB0aGF0IHlvdQo+ID5zaG91bGQgYmUgdGFsa2luZyBhYm91dCBI VyBiaXRzIGluIHRoZSBjb250cm9sbGVyIC0tIGkuZS4sIHlvdSBoYXZlIGEKPiA+NC1iaXQgaW50 ZXJydXB0IHN0YXR1cyBiaXRmaWVsZCwgdGhhdCB3ZSB0eXBpY2FsbHkgY2FsbCBbMDozXS4gSWYg eW91Cj4gPnVzZSBbMTo0XSwgdGhlbiB5b3UgaGF2ZSB0byByZW1lbWJlciB0byBzdWJ0cmFjdCAx IG1lbnRhbGx5IHdoZW4gbWFwcGluZwo+ID50byB0aGUgYWN0dWFsIEhXIGJpdC4gSSBiZWxpZXZl IHRoYXQgY29uZnVzaW9uIChzaW5jZSBiaXRmaWVsZHMgbm9ybWFsbHkKPiA+Y291bnQgZnJvbSAw KSBtaWdodCBoYXZlIGhlbHBlZCBjYXVzZSB0aGUgaW5maW5pdGUgbG9vcCBidWcgSSBub3RpY2Vk Cj4gPnRvby4gQW5kIEkgYWxzbyB0aGluayB0aGF0IGNvdW50aW5nIGZyb20gMCBoZWxwcyBjbGFy aWZ5IHRoZSBmYWN0IHRoYXQKPiA+eW91ciBpbnRlcnJ1cHQgY29udHJvbGxlciBpbmRleGluZyBp cyBhbiBpbmRlcGVuZGVudCBudW1iZXJpbmcgZnJvbSB0aGUKPiA+UENJIGludGVycnVwdCBudW1i ZXJpbmcsIGV2ZW4gdGhvdWdoIHRoZXkgaGFwcGVuIHRvIG1hcCAxOjEuCj4gCj4gSWYgdGhhdCdz IHRoZSBmYWN0IG9mIGhvdyB3ZSBzaG91bGQgbnVtYmVyaW5nIG91ciBpbmRleCBiYXNlLCB3ZSBz aG91bGQKPiBwcm9iYWJseSBzdGFydCBpZiBmcm9tIDUgYXMgdGhlIGxheW91dCBvZiBJTlR4IGlz Cj4gUENJRV9DTElFTlRfSU5UX1NUQVRVU1s1OjhdLi4uID8KClBvc3NpYmx5IGJldHRlciB0aGFu IHN0YXJ0aW5nIGZyb20gMSwgYnV0IElNTyBhbHNvIGRvZXNuJ3QgbWFrZSBzZW5zZSwKYmVjYXVz ZSB0aGUgb3RoZXIgYml0cyBhcmVuJ3QgaW50ZXJydXB0cyB5b3Ugd2FudCB0byB0cmFuc2xhdGUg b24gYmVoYWxmCm9mIG90aGVyIGRldmljZXMgKGFyZSB0aGV5PykgLS0gdGhleSdyZSBpbnRlcnJ1 cHQgYml0cyBjb25zdW1lZCBieSB0aGUKaG9zdCBjb250cm9sbGVyIGl0c2VsZi4gKElmIHRoZXkg YXJlIHBvc3NpYmx5IG5lZWRlZCBmb3IgdHJhbnNsYXRpb24sCnRoZW4gc3VyZSwgaW5kZXggdGhl IGVudGlyZSBzdGF0dXMgcmVnaXN0ZXIgYW5kIGhhbmRsZSBpdCBpbiB0aGUgZHJpdmVyLAphbmQg c3RhcnQgdGhlIElOVHggbWFwcGluZyBmcm9tIDUgaGVyZS4pCgpbLi4uXQoKPiA+SWYgeW91IHN0 aWxsIHRoaW5rIGl0IG1ha2VzIG1vcmUgc2Vuc2UgdG8gY291bnQgZnJvbSAxLCB0aGVuIEkgd29u J3QKPiA+c3RvcCB5b3UuCj4gCj4gSSBkb24ndCBoYXZlIGEgaGFyZCBvcGluaW9uIGZvciB0aGUg aW5kZXggYmFzZSBhcyBJIHRoaW5rIGl0J3MgdHJpdmlhbC4KCkl0J3Mgc2ltcGxlLCBidXQgSSB0 aGluayBpdCBpbmZsdWVuY2VkIGNvZGUgdW5kZXJzdGFuZGluZyBhbmQgYnVnZ2luZXNzLgoKPiBT byBpZiBpdCdzIG1vcmUgc2Vuc2libGUgdG8geW91LCBJIHdpbGwgYXBwbHkgeW91ciBzdWdnZXN0 aW9uLgoKV2VsbCwgSSB3YXMganVzdCBvZmZlcmluZyBteSBvcGluaW9uLiBJIHRoaW5rIGl0IG1h a2VzIG1vcmUgc2Vuc2UsIGJ1dAptYXliZSBpdCBkb2Vzbid0IHRvIHlvdS4KCkJyaWFuCgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpMaW51eC1yb2NrY2hp cCBtYWlsaW5nIGxpc3QKTGludXgtcm9ja2NoaXBAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8v bGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LXJvY2tjaGlwCg==