From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47880) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNn7v-00006Z-Ak for qemu-devel@nongnu.org; Thu, 14 Jul 2016 16:20:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bNn7t-0001at-9W for qemu-devel@nongnu.org; Thu, 14 Jul 2016 16:20:54 -0400 Received: from mail-yw0-x242.google.com ([2607:f8b0:4002:c05::242]:34717) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNn7t-0001ai-5k for qemu-devel@nongnu.org; Thu, 14 Jul 2016 16:20:53 -0400 Received: by mail-yw0-x242.google.com with SMTP id l125so5542841ywb.1 for ; Thu, 14 Jul 2016 13:20:53 -0700 (PDT) From: Pranith Kumar Date: Thu, 14 Jul 2016 16:20:17 -0400 Message-Id: <20160714202026.9727-6-bobby.prani@gmail.com> In-Reply-To: <20160714202026.9727-1-bobby.prani@gmail.com> References: <20160714202026.9727-1-bobby.prani@gmail.com> Subject: [Qemu-devel] [PATCH v4 05/14] tcg/ia64: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , Richard Henderson , "open list:All patches CC here" Cc: alex.bennee@linaro.org, serge.fdrv@gmail.com, pbonzini@redhat.com, peter.maydell@linaro.org Cc: Aurelien Jarno Signed-off-by: Richard Henderson Signed-off-by: Pranith Kumar --- tcg/ia64/tcg-target.inc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-target.inc.c index c91f392..26812ee 100644 --- a/tcg/ia64/tcg-target.inc.c +++ b/tcg/ia64/tcg-target.inc.c @@ -247,6 +247,7 @@ enum { OPC_LD4_M3 = 0x0a080000000ull, OPC_LD8_M1 = 0x080c0000000ull, OPC_LD8_M3 = 0x0a0c0000000ull, + OPC_MF_M24 = 0x00110000000ull, OPC_MUX1_I3 = 0x0eca0000000ull, OPC_NOP_B9 = 0x04008000000ull, OPC_NOP_F16 = 0x00008000000ull, @@ -2223,6 +2224,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_qemu_st(s, args); break; + case INDEX_op_mb: + tcg_out_bundle(s, mmI, OPC_MF_M24, INSN_NOP_M, INSN_NOP_I); + break; case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_mov_i64: case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ @@ -2336,6 +2340,7 @@ static const TCGTargetOpDef ia64_op_defs[] = { { INDEX_op_qemu_st_i32, { "SZ", "r" } }, { INDEX_op_qemu_st_i64, { "SZ", "r" } }, + { INDEX_op_mb, { } }, { -1 }, }; -- 2.9.0