[U-Boot] [PATCH 8/8] xtensa: add support for the 'xtfpga' evaluation board

[Max Filippov <jcmvbkbc@gmail.com>]

Hi Simon,

On Tue, Jul 12, 2016 at 03:57:00PM -0600, Simon Glass wrote:
> On 8 July 2016 at 09:42, Max Filippov <jcmvbkbc@gmail.com> wrote:
> > From: Chris Zankel <chris@zankel.net>
> >
> > The 'xtfpga' board is actually a set of FPGA evaluation boards that
> > can be configured to run an Xtensa processor.
> >
> >  - Avnet Xilinx LX60
> >  - Avnet Xilinx LX110
> >  - Avnet Xilinx LX200
> >  - Xilinx ML605
> >  - Xilinx KC705
> >
> > These boards share the same components (open-ethernet, ns16550 serial,
> > lcd display, flash, etc.).
> >
> > Signed-off-by: Chris Zankel <chris@zankel.net>
> > Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
> > ---

[...]

> >  board/cadence/xtfpga/lcd.c             |  88 ++++++++++
> 
> This should be in drivers/video and use driver model (UCLASS_VIDEO).

Ok, will move.

> > diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c
> > new file mode 100644
> > index 0000000..35de2f3
> > --- /dev/null
> > +++ b/board/cadence/xtfpga/xtfpga.c
> > @@ -0,0 +1,173 @@
> > +/*
> > + * (C) Copyright 2007 - 2013 Tensilica Inc.
> > + * (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
> > + *
> > + * SPDX-License-Identifier:    GPL-2.0+
> > + */
> > +
> > +#include <common.h>
> > +#include <command.h>
> > +#include <linux/ctype.h>
> > +#include <linux/string.h>
> > +#include <linux/stringify.h>
> > +#include <asm/xtensa.h>
> > +#include <asm/global_data.h>
> > +#include <netdev.h>
> > +
> > +#include "lcd.h"
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +/*
> > + * Check board idendity.
> > + * (Print information about the board to stdout.)
> > + */
> > +
> > +
> > +#if defined(CONFIG_XTFPGA_LX60)
> > +const char *board = "XT_AV60";
> > +const char *description = "Avnet Xilinx LX60 FPGA Evaluation Board / ";
> > +#elif defined(CONFIG_XTFPGA_LX110)
> > +const char *board = "XT_AV110";
> > +const char *description = "Avnet Xilinx Virtex-5 LX110 Evaluation Kit / ";
> > +#elif defined(CONFIG_XTFPGA_LX200)
> > +const char *board = "XT_AV200";
> > +const char *description = "Avnet Xilinx Virtex-4 LX200 Evaluation Kit / ";
> > +#elif defined(CONFIG_XTFPGA_ML605)
> > +const char *board = "XT_ML605";
> > +const char *description = "Xilinx Virtex-6 FPGA ML605 Evaluation Kit / ";
> > +#elif defined(CONFIG_XTFPGA_KC705)
> > +const char *board = "XT_KC705";
> > +const char *description = "Xilinx Kintex-7 FPGA KC705 Evaluation Kit / ";
> > +#else
> > +const char *board = "<unknown>";
> > +const char *description = "";
> > +#endif
> 
> Shouldn't this go in the device tree? See show_board_info().

It can, but we don't have OF_CONTROL enabled in the default XTFPGA
configuration. One reason is that otherwise it wouldn't fit into the LX60
board.

> > +
> > +int checkboard(void)
> > +{
> > +       printf("Board: %s: %sTensilica bitstream\n", board, description);
> > +       return 0;
> > +}
> > +
> > +void dram_init_banksize(void)
> > +{
> > +       gd->bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
> > +       gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
> > +}
> > +
> > +int board_postclk_init(void)
> > +{
> > +       /*
> > +        * Obtain CPU clock frequency from board and cache in global
> > +        * data structure (Hz). Return 0 on success (OK to continue),
> > +        * else non-zero (hang).
> > +        */
> > +
> > +#ifdef CONFIG_SYS_FPGAREG_FREQ
> > +       gd->cpu_clk = (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ);
> > +#else
> > +       /* early Tensilica bitstreams lack this reg, but most run at 50 MHz */
> > +       gd->cpu_clk = 50000000UL;
> > +#endif
> > +       return 0;
> > +}
> > +
> > +/*
> > + * Miscellaneous early initializations.
> > + * We use this hook to initialize the LCD display.
> > + */
> > +
> > +int misc_init_f(void)
> > +{
> > +#ifdef CONFIG_SYS_ASCDISP
> > +       /* Initialize the LCD. */
> > +
> > +       lcd_init();
> > +#endif
> > +       display_printf("U-Boot starting", NULL);
> 
> Should use driver-model.

Ok.

-- 
Thanks.
-- Max