From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60777) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQHqe-0001kH-Hl for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:33:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQHqa-0005oF-Bb for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:33:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44898) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQHqa-0005o6-1z for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:33:20 -0400 Date: Thu, 21 Jul 2016 18:33:13 +0100 From: "Dr. David Alan Gilbert" Message-ID: <20160721173312.GC3770@work-vm> References: <1468855127-22621-1-git-send-email-dgilbert@redhat.com> <1468855127-22621-2-git-send-email-dgilbert@redhat.com> <85f3b28c-8c02-0fa1-d29e-85d7d386ca43@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <85f3b28c-8c02-0fa1-d29e-85d7d386ca43@reactos.org> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 1/1] vmstateify rc4030 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-1?Q?Herv=E9?= Poussineau Cc: qemu-devel@nongnu.org, aurelien@aurel32.net, leon.alrae@imgtec.com * Herv=E9 Poussineau (hpoussin@reactos.org) wrote: > Hi, >=20 > Le 18/07/2016 =E0 17:18, Dr. David Alan Gilbert (git) a =E9crit : > > From: "Dr. David Alan Gilbert" > >=20 > > rc4030 seems to be part of a MIPS chipset; this converts it to > > VMState. > >=20 > > Note: > > a) It builds but I've not found a way to boot a MIPS Jazz image t= o > > test it. > > b) It was saving 0..<15 on the 16 entry rem_speed array; I've not > > got a clue what that array is but I'm now saving the whole 16 entries > > rather than 15. > >=20 > > Signed-off-by: Dr. David Alan Gilbert >=20 > rc4030 is the main chipset of MIPS Jazz machines (like Magnum or PICA 6= 1). It is both a interrupt controller, a DMA controller and a memory cont= roller. > - savevm on magnum doesn't work (before and after your patch) and crash= es QEMU when saving(?) g364 framebuffer state. Fun - your vmstate_g364fb looks OK, assuming vram_size is sane. > - savevm + loadvm on pica61 works. Great. > The rem_speed[15] (whatever rem_speed means) is the interrupt mask regi= ster, that is currently stored in imr_jazz field. Except Aurelien's patch 9ea0b7a139 made rem_speed[15] exist, where it use= d to be just 0..14? > Reviewed-by: Herv=E9 Poussineau > Tested-by: Herv=E9 Poussineau Thanks! Dave >=20 > Herv=E9 >=20 > > --- > > hw/dma/rc4030.c | 81 +++++++++++++++++++----------------------------= ---------- > > 1 file changed, 27 insertions(+), 54 deletions(-) > >=20 > > diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c > > index 2f2576f..17c8518 100644 > > --- a/hw/dma/rc4030.c > > +++ b/hw/dma/rc4030.c > > @@ -616,34 +616,9 @@ static void rc4030_reset(DeviceState *dev) > > qemu_irq_lower(s->jazz_bus_irq); > > } > >=20 > > -static int rc4030_load(QEMUFile *f, void *opaque, int version_id) > > +static int rc4030_post_load(void *opaque, int version_id) > > { > > rc4030State* s =3D opaque; > > - int i, j; > > - > > - if (version_id !=3D 2) > > - return -EINVAL; > > - > > - s->config =3D qemu_get_be32(f); > > - s->invalid_address_register =3D qemu_get_be32(f); > > - for (i =3D 0; i < 8; i++) > > - for (j =3D 0; j < 4; j++) > > - s->dma_regs[i][j] =3D qemu_get_be32(f); > > - s->dma_tl_base =3D qemu_get_be32(f); > > - s->dma_tl_limit =3D qemu_get_be32(f); > > - s->cache_maint =3D qemu_get_be32(f); > > - s->remote_failed_address =3D qemu_get_be32(f); > > - s->memory_failed_address =3D qemu_get_be32(f); > > - s->cache_ptag =3D qemu_get_be32(f); > > - s->cache_ltag =3D qemu_get_be32(f); > > - s->cache_bmask =3D qemu_get_be32(f); > > - s->memory_refresh_rate =3D qemu_get_be32(f); > > - s->nvram_protect =3D qemu_get_be32(f); > > - for (i =3D 0; i < 15; i++) > > - s->rem_speed[i] =3D qemu_get_be32(f); > > - s->imr_jazz =3D qemu_get_be32(f); > > - s->isr_jazz =3D qemu_get_be32(f); > > - s->itr =3D qemu_get_be32(f); > >=20 > > set_next_tick(s); > > update_jazz_irq(s); > > @@ -651,32 +626,31 @@ static int rc4030_load(QEMUFile *f, void *opaqu= e, int version_id) > > return 0; > > } > >=20 > > -static void rc4030_save(QEMUFile *f, void *opaque) > > -{ > > - rc4030State* s =3D opaque; > > - int i, j; > > - > > - qemu_put_be32(f, s->config); > > - qemu_put_be32(f, s->invalid_address_register); > > - for (i =3D 0; i < 8; i++) > > - for (j =3D 0; j < 4; j++) > > - qemu_put_be32(f, s->dma_regs[i][j]); > > - qemu_put_be32(f, s->dma_tl_base); > > - qemu_put_be32(f, s->dma_tl_limit); > > - qemu_put_be32(f, s->cache_maint); > > - qemu_put_be32(f, s->remote_failed_address); > > - qemu_put_be32(f, s->memory_failed_address); > > - qemu_put_be32(f, s->cache_ptag); > > - qemu_put_be32(f, s->cache_ltag); > > - qemu_put_be32(f, s->cache_bmask); > > - qemu_put_be32(f, s->memory_refresh_rate); > > - qemu_put_be32(f, s->nvram_protect); > > - for (i =3D 0; i < 15; i++) > > - qemu_put_be32(f, s->rem_speed[i]); > > - qemu_put_be32(f, s->imr_jazz); > > - qemu_put_be32(f, s->isr_jazz); > > - qemu_put_be32(f, s->itr); > > -} > > +static const VMStateDescription vmstate_rc4030 =3D { > > + .name =3D "rc4030", > > + .version_id =3D 3, > > + .post_load =3D rc4030_post_load, > > + .fields =3D (VMStateField []) { > > + VMSTATE_UINT32(config, rc4030State), > > + VMSTATE_UINT32(invalid_address_register, rc4030State), > > + VMSTATE_UINT32_2DARRAY(dma_regs, rc4030State, 8, 4), > > + VMSTATE_UINT32(dma_tl_base, rc4030State), > > + VMSTATE_UINT32(dma_tl_limit, rc4030State), > > + VMSTATE_UINT32(cache_maint, rc4030State), > > + VMSTATE_UINT32(remote_failed_address, rc4030State), > > + VMSTATE_UINT32(memory_failed_address, rc4030State), > > + VMSTATE_UINT32(cache_ptag, rc4030State), > > + VMSTATE_UINT32(cache_ltag, rc4030State), > > + VMSTATE_UINT32(cache_bmask, rc4030State), > > + VMSTATE_UINT32(memory_refresh_rate, rc4030State), > > + VMSTATE_UINT32(nvram_protect, rc4030State), > > + VMSTATE_UINT32_ARRAY(rem_speed, rc4030State, 16), > > + VMSTATE_UINT32(imr_jazz, rc4030State), > > + VMSTATE_UINT32(isr_jazz, rc4030State), > > + VMSTATE_UINT32(itr, rc4030State), > > + VMSTATE_END_OF_LIST() > > + } > > +}; > >=20 > > static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len= , int is_write) > > { > > @@ -753,8 +727,6 @@ static void rc4030_initfn(Object *obj) > > sysbus_init_irq(sysbus, &s->timer_irq); > > sysbus_init_irq(sysbus, &s->jazz_bus_irq); > >=20 > > - register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, = s); > > - > > sysbus_init_mmio(sysbus, &s->iomem_chipset); > > sysbus_init_mmio(sysbus, &s->iomem_jazzio); > > } > > @@ -813,6 +785,7 @@ static void rc4030_class_init(ObjectClass *klass,= void *class_data) > > dc->realize =3D rc4030_realize; > > dc->unrealize =3D rc4030_unrealize; > > dc->reset =3D rc4030_reset; > > + dc->vmsd =3D &vmstate_rc4030; > > } > >=20 > > static const TypeInfo rc4030_info =3D { > >=20 >=20 -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK