From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Julien Grall <julien.grall@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>,
sstabellini@kernel.org, Steve Capper <Steve.Capper@arm.com>,
Wei Chen <Wei.Chen@linaro.org>,
xen-devel@lists.xen.org
Subject: Re: [PATCH v5 1/7] xen/arm: Introduce alternative runtime patching
Date: Fri, 22 Jul 2016 11:38:28 -0400 [thread overview]
Message-ID: <20160722153828.GB27628@char.us.oracle.com> (raw)
In-Reply-To: <ed76ba55-a33b-a38e-42a1-91d51991af7a@arm.com>
> >>+
> >>+ origptr = ALT_ORIG_PTR(alt);
> >>+ writeptr = origptr - (u32 *)_start + writemap;
> >
> >How about just using writeptr += ?
>
> I am not sure about your suggestion here. Regardless the Linux code, the
> origptr will not follow a pattern at each iteration. So we have to recompute
> it everytime.
Just ignore that. I somehow equated writeptr to writemp.
..snip..
>
> >
> >Ah wait. You are trying to preserve the Linux code!. Nevermind then.
> >
> >>+ replptr = ALT_REPL_PTR(alt);
> >>+
> >>+ nr_inst = alt->alt_len / sizeof(insn);
> >>+
> >>+ for ( i = 0; i < nr_inst; i++ )
> >>+ {
> >>+ insn = get_alt_insn(alt, origptr + i, replptr + i);
> >>+ *(writeptr + i) = cpu_to_le32(insn);
> >>+ }
> >>+
> >>+ /* Ensure the new instructions reached the memory and nuke */
> >>+ clean_and_invalidate_dcache_va_range(writeptr,
> >>+ (sizeof (*writeptr) * nr_inst));
> >>+ }
> >>+
> >>+ /* Nuke the instruction cache */
> >>+ invalidate_icache();
> >>+
> >>+ vunmap(writemap);
> >>+
> >>+ return 0;
> >>+}
> >>+
> >>+/*
> >>+ * We might be patching the stop_machine state machine, so implement a
> >>+ * really simple polling protocol here.
> >>+ */
> >>+static int __apply_alternatives_multi_stop(void *unused)
> >>+{
> >>+ static int patched = 0;
> >
> >Shouldn't this be 'atomic_t' ?
>
> Does it matter? From my understanding the code will behave the same.
Not at all under the hood.
But I see 'atomic_write' and they all operate on the 'atomic_t' .. hence
the query.
..snip.
> >This being a new file perhaps add:
> >*
> > * Local variables:
> > * mode: C
> > * c-file-style: "BSD"
> > * c-basic-offset: 4
> > * indent-tabs-mode: nil
> > * End:
> > */
> >?
>
> It is a Linux file with Linux coding style. I would need to look what should
> be the emacs magic block here.
Right. I just meant that you needed the magic block.
>
> Regards,
>
> --
> Julien Grall
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next prev parent reply other threads:[~2016-07-22 15:38 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-20 15:25 [PATCH v5 0/7] xen/arm: Introduce alternative runtime patching for ARM64 Julien Grall
2016-07-20 15:25 ` [PATCH v5 1/7] xen/arm: Introduce alternative runtime patching Julien Grall
2016-07-21 0:32 ` [PATCH v5 1/7] xen/arm: Introduce alternative runtime patchingo Stefano Stabellini
2016-07-22 14:15 ` [PATCH v5 1/7] xen/arm: Introduce alternative runtime patching Konrad Rzeszutek Wilk
2016-07-22 15:29 ` Julien Grall
2016-07-22 15:38 ` Konrad Rzeszutek Wilk [this message]
2016-07-22 15:47 ` Julien Grall
2016-07-20 15:25 ` [PATCH v5 2/7] xen/arm: cpufeature: Provide an helper to check if a capability is supported Julien Grall
2016-07-22 14:18 ` Konrad Rzeszutek Wilk
2016-07-22 15:31 ` Julien Grall
2016-07-22 15:39 ` Konrad Rzeszutek Wilk
2016-07-20 15:25 ` [PATCH v5 3/7] xen/arm: Detect silicon revision and set cap bits accordingly Julien Grall
2016-07-22 14:24 ` Konrad Rzeszutek Wilk
2016-07-27 16:09 ` Julien Grall
2016-07-20 15:25 ` [PATCH v5 4/7] xen/arm: Document the errata implemented in Xen Julien Grall
2016-07-22 14:25 ` Konrad Rzeszutek Wilk
2016-07-20 15:25 ` [PATCH v5 5/7] xen/arm: arm64: Add Cortex-A53 cache errata workaround Julien Grall
2016-07-20 15:25 ` [PATCH v5 6/7] xen/arm: arm64: Add cortex-A57 erratum 832075 workaround Julien Grall
2016-07-20 15:26 ` [PATCH v5 7/7] xen/arm: traps: Don't inject a fault if the translation VA -> IPA fails Julien Grall
2016-07-22 14:29 ` [PATCH v5 0/7] xen/arm: Introduce alternative runtime patching for ARM64 Konrad Rzeszutek Wilk
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