From: David Gibson <david@gibson.dropbear.id.au>
To: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Cc: qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org,
bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com,
benh@kernel.crashing.org,
Sandipan Das <sandipandas1990@gmail.com>
Subject: Re: [Qemu-devel] [PATCH RFC v0 1/6] target-ppc: add dtstsfi[q] instructions
Date: Wed, 27 Jul 2016 15:42:57 +1000 [thread overview]
Message-ID: <20160727054257.GG17429@voom.fritz.box> (raw)
In-Reply-To: <1469561218-3067-2-git-send-email-nikunj@linux.vnet.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 6344 bytes --]
On Wed, Jul 27, 2016 at 12:56:53AM +0530, Nikunj A Dadhania wrote:
> From: Sandipan Das <sandipandas1990@gmail.com>
>
> DFP Test Significance Immediate [Quad]
>
> Signed-off-by: Sandipan Das <sandipandas1990@gmail.com>
> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> target-ppc/dfp_helper.c | 35 +++++++++++++++++++++++++++++++++++
> target-ppc/helper.h | 2 ++
> target-ppc/translate.c | 22 ++++++++++++++++++++++
> 3 files changed, 59 insertions(+)
>
> diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
> index db0ede6..9164fe7 100644
> --- a/target-ppc/dfp_helper.c
> +++ b/target-ppc/dfp_helper.c
> @@ -647,6 +647,41 @@ uint32_t helper_##op(CPUPPCState *env, uint64_t *a, uint64_t *b) \
> DFP_HELPER_TSTSF(dtstsf, 64)
> DFP_HELPER_TSTSF(dtstsfq, 128)
>
> +#define DFP_HELPER_TSTSFI(op, size) \
> +uint32_t helper_##op(CPUPPCState *env, uint32_t a, uint64_t *b) \
> +{ \
> + struct PPC_DFP dfp; \
> + unsigned uim; \
> + \
> + dfp_prepare_decimal##size(&dfp, 0, b, env); \
> + \
> + uim = a & 0x3F; \
> + \
> + if (unlikely(decNumberIsSpecial(&dfp.b))) { \
> + dfp.crbf = 1; \
> + } else if (uim == 0) { \
> + dfp.crbf = 4; \
> + } else if (unlikely(decNumberIsZero(&dfp.b))) { \
> + /* Zero has no sig digits */ \
> + dfp.crbf = 4; \
> + } else { \
> + unsigned nsd = dfp.b.digits; \
> + if (uim < nsd) { \
> + dfp.crbf = 8; \
> + } else if (uim > nsd) { \
> + dfp.crbf = 4; \
> + } else { \
> + dfp.crbf = 2; \
> + } \
> + } \
> + \
> + dfp_set_FPCC_from_CRBF(&dfp); \
> + return dfp.crbf; \
> +}
> +
> +DFP_HELPER_TSTSFI(dtstsfi, 64)
> +DFP_HELPER_TSTSFI(dtstsfiq, 128)
> +
> static void QUA_PPs(struct PPC_DFP *dfp)
> {
> dfp_set_FPRF_from_FRT(dfp);
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 9e4bb7b..68fd19e 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -645,6 +645,8 @@ DEF_HELPER_3(dtstex, i32, env, fprp, fprp)
> DEF_HELPER_3(dtstexq, i32, env, fprp, fprp)
> DEF_HELPER_3(dtstsf, i32, env, fprp, fprp)
> DEF_HELPER_3(dtstsfq, i32, env, fprp, fprp)
> +DEF_HELPER_3(dtstsfi, i32, env, i32, fprp)
> +DEF_HELPER_3(dtstsfiq, i32, env, i32, fprp)
> DEF_HELPER_5(dquai, void, env, fprp, fprp, i32, i32)
> DEF_HELPER_5(dquaiq, void, env, fprp, fprp, i32, i32)
> DEF_HELPER_5(dqua, void, env, fprp, fprp, fprp, i32)
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index d522566..23ef538 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -8678,6 +8678,24 @@ static void gen_##name(DisasContext *ctx) \
> tcg_temp_free_ptr(rb); \
> }
>
> +#define GEN_DFP_BF_I_B(name) \
> +static void gen_##name(DisasContext *ctx) \
> +{ \
> + TCGv_i32 uim; \
> + TCGv_ptr rb; \
> + if (unlikely(!ctx->fpu_enabled)) { \
> + gen_exception(ctx, POWERPC_EXCP_FPU); \
> + return; \
> + } \
> + gen_update_nip(ctx, ctx->nip - 4); \
> + uim = tcg_const_i32(UIMM5(ctx->opcode)); \
> + rb = gen_fprp_ptr(rB(ctx->opcode)); \
> + gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \
> + cpu_env, uim, rb); \
> + tcg_temp_free_i32(uim); \
> + tcg_temp_free_ptr(rb); \
> +}
> +
> #define GEN_DFP_BF_A_DCM(name) \
> static void gen_##name(DisasContext *ctx) \
> { \
> @@ -8805,6 +8823,8 @@ GEN_DFP_BF_A_B(dtstex)
> GEN_DFP_BF_A_B(dtstexq)
> GEN_DFP_BF_A_B(dtstsf)
> GEN_DFP_BF_A_B(dtstsfq)
> +GEN_DFP_BF_I_B(dtstsfi)
> +GEN_DFP_BF_I_B(dtstsfiq)
> GEN_DFP_T_B_U32_U32_Rc(dquai, SIMM5, RMC)
> GEN_DFP_T_B_U32_U32_Rc(dquaiq, SIMM5, RMC)
> GEN_DFP_T_A_B_I32_Rc(dqua, RMC)
> @@ -11456,6 +11476,8 @@ GEN_DFP_BF_A_B(dtstex, 0x02, 0x05),
> GEN_DFP_BF_Ap_Bp(dtstexq, 0x02, 0x05),
> GEN_DFP_BF_A_B(dtstsf, 0x02, 0x15),
> GEN_DFP_BF_A_Bp(dtstsfq, 0x02, 0x15),
> +GEN_DFP_BF_A_B(dtstsfi, 0x03, 0x15),
> +GEN_DFP_BF_A_Bp(dtstsfiq, 0x03, 0x15),
> GEN_DFP_TE_T_B_RMC_Rc(dquai, 0x03, 0x02),
> GEN_DFP_TE_Tp_Bp_RMC_Rc(dquaiq, 0x03, 0x02),
> GEN_DFP_T_A_B_RMC_Rc(dqua, 0x03, 0x00),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2016-07-27 6:07 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-26 19:26 [Qemu-devel] [PATCH RFC v0 0/6] POWER9 TCG enablements - part2 Nikunj A Dadhania
2016-07-26 19:26 ` [Qemu-devel] [PATCH RFC v0 1/6] target-ppc: add dtstsfi[q] instructions Nikunj A Dadhania
2016-07-27 5:42 ` David Gibson [this message]
2016-07-26 19:26 ` [Qemu-devel] [PATCH RFC v0 2/6] target-ppc: add vabsdu[b, h, w] instructions Nikunj A Dadhania
2016-07-27 5:52 ` David Gibson
2016-07-27 6:19 ` Nikunj A Dadhania
2016-07-26 19:26 ` [Qemu-devel] [PATCH RFC v0 3/6] target-ppc: add vcmpnez[b, h, w][.] instructions Nikunj A Dadhania
2016-07-27 5:57 ` David Gibson
2016-07-27 6:22 ` Nikunj A Dadhania
2016-07-26 19:26 ` [Qemu-devel] [PATCH RFC v0 4/6] target-ppc: add vslv instruction Nikunj A Dadhania
2016-07-27 6:03 ` David Gibson
2016-07-26 19:26 ` [Qemu-devel] [PATCH RFC v0 5/6] target-ppc: add vsrv instruction Nikunj A Dadhania
2016-07-27 6:05 ` David Gibson
2016-07-27 6:31 ` Nikunj A Dadhania
2016-07-27 6:48 ` David Gibson
2016-07-27 6:57 ` Nikunj A Dadhania
2016-07-27 7:02 ` David Gibson
2016-07-26 19:26 ` [Qemu-devel] [PATCH RFC v0 6/6] target-ppc: add extswsli[.] instruction Nikunj A Dadhania
2016-07-27 6:07 ` David Gibson
2016-07-28 4:33 ` [Qemu-devel] [PATCH RFC v0 0/6] POWER9 TCG enablements - part2 David Gibson
2016-07-28 6:06 ` Nikunj A Dadhania
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