From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [Intel-gfx] [PATCH v4 0/6] Finally fix watermarks Date: Fri, 29 Jul 2016 12:39:05 +0300 Message-ID: <20160729093905.GU4329@intel.com> References: <1469554483-24999-1-git-send-email-cpaul@redhat.com> <20160729000352.GR32025@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20160729000352.GR32025@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Matt Roper Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Daniel Vetter , Lyude List-Id: dri-devel@lists.freedesktop.org T24gVGh1LCBKdWwgMjgsIDIwMTYgYXQgMDU6MDM6NTJQTSAtMDcwMCwgTWF0dCBSb3BlciB3cm90 ZToKPiBUaGlzIGlzIGNvbXBsZXRlbHkgdW50ZXN0ZWQgKGFuZCBwcm9iYWJseSBob3JyaWJseSBi cm9rZW4vYnVnZ3kpLCBidXQKPiBoZXJlJ3MgYSBxdWljayBtb2NrdXAgb2YgdGhlIGdlbmVyYWwg YXBwcm9hY2ggSSB3YXMgdGhpbmtpbmcgZm9yCj4gZW5zdXJpbmcgRERCICYgV00ncyBjYW4gYmUg dXBkYXRlZCB0b2dldGhlciB3aGlsZSBlbnN1cmluZyB0aGUKPiB0aHJlZS1zdGVwIHBpcGUgZmx1 c2hpbmcgcHJvY2VzcyBpcyBob25vcmVkOgo+IAo+ICAgICAgICAgaHR0cHM6Ly9naXRodWIuY29t L21hdHRyb3BlL2tlcm5lbC9jb21taXRzL2V4cGVyaW1lbnRhbC9seXVkZV9kZGIKPiAKPiBCYXNp Y2FsbHkgdGhlIGlkZWEgaXMgdG8gdGFrZSBub3RlIG9mIHdoYXQncyBoYXBwZW5pbmcgdG8gdGhl IHBpcGUncyBEREIKPiBhbGxvY2F0aW9uIChzaHJpbmtpbmcsIGdyb3dpbmcsIHVuY2hhbmdlZCwg ZXRjLikgZHVyaW5nIHRoZSBhdG9taWMgY2hlY2sKPiBwaGFzZTsKCkRpZG4ndCBsb29rIHRvbyBj bG9zZWx5LCBidXQgSSB0aGluayB5b3UgY2FuJ3QgYWN0dWFsbHkgZG8gdGhhdCB1bmxlc3MKeW91 IGxvY2sgYWxsIHRoZSBjcnRjcyB3aGVuZXZlciB0aGUgbnVtYmVyIG9mIGFjdGl2ZSBwaXBlcyBp cyBnb2luZCB0bwpjaGFuZ2UuIE1lYW5pbmcgd2UnZCBlc3NlbnRpYWxseSBiZSBiYWNrIHRvIHRo ZSBvbmUtYmlnLW1vZGVzZXQtbG9jawphcHBvcmFjaCwgd2hpY2ggd2lsbCBjYXVzZSBtaXNzZWQg ZmxpcHMgYW5kIHdoYW5vdCBvbiB0aGUgb3RoZXIgcGlwZXMuCgpUaGUgYWx0ZXJuYXRpdmUgSSB0 aGluayB3b3VsZCBjb25zaXN0IG9mOgotIG1ha2Ugc3VyZSBsZXZlbCAwIHdhdGVybWFyayBuZXZl ciBleGNlZWRzIHRvdGFsX2RkYl9zaXplL21heF9waXBlcywKICBzbyB0aGF0IGEgbW9kZXNldCBk b2Vzbid0IGhhdmUgdG8gY2FyZSBhYm91dCB0aGUgd21zIGZvciB0aGUgb3RoZXIKICBwaXBlcyBu b3QgZml0dGluZyBpbgotIGxldmVsIDErIHdhdGVybWFya3Mgd291bGQgYmUgY2hlY2tlZCBhZ2Fp bnN0IHRvdGFsX2RkYl9zaXplCi0gcHJvdGVjdCB0aGUgcGxhbmUvcGlwZSBjb21taXQgd2l0aCB0 aGUgd20gbXV0ZXggd2hlbmV2ZXIgdGhlIHdtcwogIG5lZWQgdG8gYmUgcmVwcm9ncmFtbWVkCi0g a2VlcCB0aGUgZmx1c2hfd20gdGhpbmcgYXJvdW5kIGZvciB0aGUgY2FzZSB3aGVuIGRkYiBzaXpl IGRvZXMgZ2V0CiAgY2hhbmdlZCwgcHJvdGVjdCBpdCB3aXRoIHRoZSB3bSBsb2NrCi0gd2hlbiBw cm9ncmFtbWluZyB3bXMsIHdlIHdpbGwgZmlyc3QgZmlsdGVyIG91dCBhbnkgbGV2ZWwgdGhhdAog IGRvZXNuJ3QgZml0IGluIHdpdGggdGhlIGN1cnJlbnQgZGRiIHNpemUsIGFuZCB0aGVuIHByb2dy YW0gdGhlCiAgcmVzdCBpbgotIHBvdGVudGlhbGx5IGludHJvZHVjZSBwZXItcGlwZSB3bSBsb2Nr cyBpZiB0aGUgb25lIGJpZyBsb2NrIGxvb2tzCiAgbGlrZSBhbiBpc3N1ZSwgd2hpY2ggaXQgbWln aHQgaWYgdGhlIGZsdXNoX3dtIGhvbGRzIGl0IGFsbCB0aGUgd2F5CiAgdGhyb3VnaAoKPiB0aGVu IGR1cmluZyB0aGUgY29tbWl0IHBoYXNlLCB3ZSBsb29wIG92ZXIgdGhlIENSVEMncyB0aHJlZSB0 aW1lcwo+IGluc3RlYWQgb2YganVzdCBvbmNlLCBidXQgb25seSBvcGVyYXRlIG9uIGEgc3Vic2V0 IG9mIHRoZSBDUlRDJ3MgaW4gZWFjaAo+IGxvb3AuICBXaGlsZSBvcGVyYXRpbmcgb24gZWFjaCBD UlRDLCB0aGUgcGxhbmUsIFdNLCBhbmQgRERCIGFsbCBnZXQKPiBwcm9ncmFtbWVkIHRvZ2V0aGVy IGFuZCBoYXZlIGEgc2luZ2xlIGZsdXNoIGZvciBhbGwgdGhyZWUuCj4KPiAKPiAKPiAKPiBNYXR0 Cj4gCj4gT24gVHVlLCBKdWwgMjYsIDIwMTYgYXQgMDE6MzQ6MzZQTSAtMDQwMCwgTHl1ZGUgd3Jv dGU6Cj4gPiBMYXRlc3QgdmVyc2lvbiBvZiBodHRwczovL2xrbWwub3JnL2xrbWwvMjAxNi83LzI2 LzI5MCAuIFJlc2VuZGluZyB0aGUgd2hvbGUKPiA+IHRoaW5nIHRvIGtlZXAgaXQgaW4gb25lIHBs YWNlLgo+ID4gCj4gPiBMeXVkZSAoNSk6Cj4gPiAgIGRybS9pOTE1L3NrbDogQWRkIHN1cHBvcnQg Zm9yIHRoZSBTQUdWLCBmaXggdW5kZXJydW4gaGFuZ3MKPiA+ICAgZHJtL2k5MTUvc2tsOiBPbmx5 IGZsdXNoIHBpcGVzIHdoZW4gd2UgY2hhbmdlIHRoZSBkZGIgYWxsb2NhdGlvbgo+ID4gICBkcm0v aTkxNS9za2w6IEZpeCBleHRyYSB3aGl0ZXNwYWNlIGluIHNrbF9mbHVzaF93bV92YWx1ZXMoKQo+ ID4gICBkcm0vaTkxNS9za2w6IFVwZGF0ZSBwbGFuZSB3YXRlcm1hcmtzIGF0b21pY2FsbHkgZHVy aW5nIHBsYW5lIHVwZGF0ZXMKPiA+ICAgZHJtL2k5MTUvc2tsOiBBbHdheXMgd2FpdCBmb3IgcGlw ZXMgdG8gdXBkYXRlIGFmdGVyIGEgZmx1c2gKPiA+IAo+ID4gTWF0dCBSb3BlciAoMSk6Cj4gPiAg IGRybS9pOTE1L2dlbjk6IE9ubHkgY29weSBXTSByZXN1bHRzIGZvciBjaGFuZ2VkIHBpcGVzIHRv IHNrbF9odwo+ID4gCj4gPiAgZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kcnYuaCAgICAgIHwg ICAzICsKPiA+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oICAgICAgfCAgIDUgKwo+ ID4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rpc3BsYXkuYyB8ICAyNCArKysrCj4gPiAg ZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHJ2LmggICAgIHwgICA0ICsKPiA+ICBkcml2ZXJz L2dwdS9kcm0vaTkxNS9pbnRlbF9wbS5jICAgICAgfCAyNDAgKysrKysrKysrKysrKysrKysrKysr KysrKysrKysrKy0tLS0KPiA+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9zcHJpdGUuYyAg fCAgIDIgKwo+ID4gIDYgZmlsZXMgY2hhbmdlZCwgMjU1IGluc2VydGlvbnMoKyksIDIzIGRlbGV0 aW9ucygtKQo+ID4gCj4gPiAtLSAKPiA+IDIuNy40Cj4gPiAKPiA+IF9fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCj4gPiBJbnRlbC1nZnggbWFpbGluZyBsaXN0 Cj4gPiBJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCj4gPiBodHRwczovL2xpc3RzLmZy ZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo+IAo+IC0tIAo+IE1hdHQg Um9wZXIKPiBHcmFwaGljcyBTb2Z0d2FyZSBFbmdpbmVlcgo+IElvVEcgUGxhdGZvcm0gRW5hYmxp bmcgJiBEZXZlbG9wbWVudAo+IEludGVsIENvcnBvcmF0aW9uCj4gKDkxNikgMzU2LTI3OTUKCi0t IApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3Rz LmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752201AbcG2JjN (ORCPT ); Fri, 29 Jul 2016 05:39:13 -0400 Received: from mga01.intel.com ([192.55.52.88]:49068 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750752AbcG2JjK (ORCPT ); Fri, 29 Jul 2016 05:39:10 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,438,1464678000"; d="scan'208";a="1026155738" Date: Fri, 29 Jul 2016 12:39:05 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Matt Roper Cc: Lyude , intel-gfx@lists.freedesktop.org, Maarten Lankhorst , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Daniel Vetter Subject: Re: [Intel-gfx] [PATCH v4 0/6] Finally fix watermarks Message-ID: <20160729093905.GU4329@intel.com> References: <1469554483-24999-1-git-send-email-cpaul@redhat.com> <20160729000352.GR32025@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20160729000352.GR32025@intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 28, 2016 at 05:03:52PM -0700, Matt Roper wrote: > This is completely untested (and probably horribly broken/buggy), but > here's a quick mockup of the general approach I was thinking for > ensuring DDB & WM's can be updated together while ensuring the > three-step pipe flushing process is honored: > > https://github.com/mattrope/kernel/commits/experimental/lyude_ddb > > Basically the idea is to take note of what's happening to the pipe's DDB > allocation (shrinking, growing, unchanged, etc.) during the atomic check > phase; Didn't look too closely, but I think you can't actually do that unless you lock all the crtcs whenever the number of active pipes is goind to change. Meaning we'd essentially be back to the one-big-modeset-lock apporach, which will cause missed flips and whanot on the other pipes. The alternative I think would consist of: - make sure level 0 watermark never exceeds total_ddb_size/max_pipes, so that a modeset doesn't have to care about the wms for the other pipes not fitting in - level 1+ watermarks would be checked against total_ddb_size - protect the plane/pipe commit with the wm mutex whenever the wms need to be reprogrammed - keep the flush_wm thing around for the case when ddb size does get changed, protect it with the wm lock - when programming wms, we will first filter out any level that doesn't fit in with the current ddb size, and then program the rest in - potentially introduce per-pipe wm locks if the one big lock looks like an issue, which it might if the flush_wm holds it all the way through > then during the commit phase, we loop over the CRTC's three times > instead of just once, but only operate on a subset of the CRTC's in each > loop. While operating on each CRTC, the plane, WM, and DDB all get > programmed together and have a single flush for all three. > > > > > Matt > > On Tue, Jul 26, 2016 at 01:34:36PM -0400, Lyude wrote: > > Latest version of https://lkml.org/lkml/2016/7/26/290 . Resending the whole > > thing to keep it in one place. > > > > Lyude (5): > > drm/i915/skl: Add support for the SAGV, fix underrun hangs > > drm/i915/skl: Only flush pipes when we change the ddb allocation > > drm/i915/skl: Fix extra whitespace in skl_flush_wm_values() > > drm/i915/skl: Update plane watermarks atomically during plane updates > > drm/i915/skl: Always wait for pipes to update after a flush > > > > Matt Roper (1): > > drm/i915/gen9: Only copy WM results for changed pipes to skl_hw > > > > drivers/gpu/drm/i915/i915_drv.h | 3 + > > drivers/gpu/drm/i915/i915_reg.h | 5 + > > drivers/gpu/drm/i915/intel_display.c | 24 ++++ > > drivers/gpu/drm/i915/intel_drv.h | 4 + > > drivers/gpu/drm/i915/intel_pm.c | 240 +++++++++++++++++++++++++++++++---- > > drivers/gpu/drm/i915/intel_sprite.c | 2 + > > 6 files changed, 255 insertions(+), 23 deletions(-) > > > > -- > > 2.7.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Matt Roper > Graphics Software Engineer > IoTG Platform Enabling & Development > Intel Corporation > (916) 356-2795 -- Ville Syrjälä Intel OTC