Re: ATPX changes in drm-next-4.8 and D3cold handling

[Peter Wu <peter-VTkQYDcBqhK7DlmcbJSQ7g@public.gmane.org>]

On Fri, Jul 29, 2016 at 03:45:50PM +0000, Deucher, Alexander wrote:
> > -----Original Message-----
> > From: Peter Wu [mailto:peter@lekensteyn.nl]
> > Sent: Thursday, July 28, 2016 8:00 PM
> > To: Lukas Wunner
> > Cc: Deucher, Alexander; dri-devel@lists.freedesktop.org; Christoph Haag;
> > Koenig, Christian; amd-gfx@lists.freedesktop.org; Zhang, Hawking
> > Subject: Re: ATPX changes in drm-next-4.8 and D3cold handling
> > 
> > On Thu, Jul 28, 2016 at 05:40:31PM +0200, Lukas Wunner wrote:
> > > On Thu, Jul 28, 2016 at 03:33:25PM +0000, Deucher, Alexander wrote:
> > > > > From: Peter Wu [mailto:peter@lekensteyn.nl]
> > > > > Sent: Thursday, July 21, 2016 6:43 AM
> > > > > In case you missed it, Dave's D3cold patches were succeeded by
> > changes
> > > > > in PCI core. Relevant commits in the pci/pm branch:
> > > > >
> > > > >     006d44e PCI: Add runtime PM support for PCIe ports
> > > > >     16468c7 ACPI / hotplug / PCI: Runtime resume bridge before rescan
> > > > >     d963f65 PCI: Power on bridges before scanning new devices
> > > > >     9d26d3a PCI: Put PCIe ports into D3 during suspend
> > > > >     43f7f88 PCI: Don't clear d3cold_allowed for PCIe ports
> > > >
> > > > Did those get merged yet?
> > >
> > > They will go into 4.8. Should have gone into 4.7 already but were
> > > dropped at the last minute.
> > >
> > >
> > > > I just need to revert this commit once the d3cold patches land:
> > > > https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-
> > 4.8&id=bdfb76040068d960cb9e226876be8a508d741c4a
> > >
> > > So you probably need to revert this now.
> > >
> > > Best regards,
> > > Lukas
> > 
> > It is better to revert it before the PCI/PM patches get merged,
> > otherwise you risk that the device is already put in D3 before the
> > bridge tries to do it again. This is currently happening with nouveau on
> > -next.
> > 
> > Do these AMD hw exist on BIOSes pre-2015? Currently the D3cold work in
> > the PCI/PM branch only enable the D3cold handling via the bridge when
> > the BIOS is >= 2015.
> 
> Systems designed for windows 10 use d3 cold rather than the legacy
> interfaces.  Setting the ACPI OSI to windows10 will enable d3cold,
> setting it to a previous version of windows will use the old method.
> At least on AMD PX systems there is a bit in the ATPX information
> block that indicates the current setting hybrid graphics (aka d3cold)
> or the ATPX power control for dGPU power control.
> 
> Alex

Windows 10 is Windows 2015, so BIOS dates for new Windows 10 devices
should be newer or equal to 2015 and no problem should occur. No
worries!

My initial concern was from the blacklist for ore-2015 BIOSes as can be
seen in function pci_bridge_d3_possible in
https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/pm&id=9d26d3a8f1b0c442339a235f9508bdad8af91043

Kind regards,
Peter
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