From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
intel-gfx@lists.freedesktop.org,
Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: Re: [PATCH 1/2] drm/i915: Always use cpp==4 for FW_BLC_SELF on 915GM/945GM
Date: Tue, 2 Aug 2016 16:42:06 +0300 [thread overview]
Message-ID: <20160802134206.GZ4329@intel.com> (raw)
In-Reply-To: <20160729163232.GC31671@nuc-i3427.alporthouse.com>
On Fri, Jul 29, 2016 at 05:32:32PM +0100, Chris Wilson wrote:
> On Fri, Jul 29, 2016 at 05:57:01PM +0300, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Bspec says:
> > "FW_BLC_SELF
> > ...
> > Programming Note [DevALV] and [DevCST]: When calculating watermark
> > values for 15/16bpp, assume 32bpp for purposes of calculation using
> > the high priority bandwidth analysis spreadsheet."
>
> It does indeed.
>
> > Let's do that.
> >
> > Perhaps this might even help with the problem that resulted in
> > commit 2ab1bc9df01d ("drm/i915: Disable self-refresh for untiled fbs on i915gm")
> >
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 1ac32428d4db..8cfef7683088 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -1604,6 +1604,9 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
> > unsigned long line_time_us;
> > int entries;
> >
> > + if (IS_I915GM(dev) || IS_I945GM(dev))
> > + cpp = 4;
> > +
>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Series pushed to dinq. Thanks for the reviews.
--
Ville Syrjälä
Intel OTC
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prev parent reply other threads:[~2016-08-02 13:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-29 14:57 [PATCH 1/2] drm/i915: Always use cpp==4 for FW_BLC_SELF on 915GM/945GM ville.syrjala
2016-07-29 14:57 ` [PATCH 2/2] drm/i915: Program FW_BLC_SELF on 915G as well ville.syrjala
2016-07-29 16:40 ` Chris Wilson
2016-07-29 15:21 ` ✗ Ro.CI.BAT: failure for series starting with [1/2] drm/i915: Always use cpp==4 for FW_BLC_SELF on 915GM/945GM Patchwork
2016-08-02 13:19 ` Ville Syrjälä
2016-07-29 16:32 ` [PATCH 1/2] " Chris Wilson
2016-08-02 13:42 ` Ville Syrjälä [this message]
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