From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bWwX8-0004zx-3J for qemu-devel@nongnu.org; Mon, 08 Aug 2016 22:12:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bWwX3-0005R1-R3 for qemu-devel@nongnu.org; Mon, 08 Aug 2016 22:12:45 -0400 Date: Tue, 9 Aug 2016 12:07:40 +1000 From: David Gibson Message-ID: <20160809020740.GC9057@voom.fritz.box> References: <1469941993-27576-1-git-send-email-benh@kernel.crashing.org> <1469941993-27576-5-git-send-email-benh@kernel.crashing.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="/e2eDi0V/xtL+Mc8" Content-Disposition: inline In-Reply-To: <1469941993-27576-5-git-send-email-benh@kernel.crashing.org> Subject: Re: [Qemu-devel] [PATCH 5/5] ppc: Improve generation of conditional traps List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Benjamin Herrenschmidt Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Richard Henderson --/e2eDi0V/xtL+Mc8 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, Jul 31, 2016 at 03:13:13PM +1000, Benjamin Herrenschmidt wrote: > Translate most conditions to TCG conditions and avoid the helper > for most of the common cases. >=20 > Signed-off-by: Benjamin Herrenschmidt > --- > target-ppc/translate.c | 168 ++++++++++++++++++++++++++++++++++++++-----= ------ > 1 file changed, 132 insertions(+), 36 deletions(-) I've merged 1-4 of this series into ppc-for-2.8. I'm not really clear whether a change is still needed on patch 5, so please resend either way. >=20 > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index 47eb9ed..561976f 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -3639,82 +3639,178 @@ static void gen_sc(DisasContext *ctx) > =20 > /*** Trap = ***/ > =20 > -/* Check for unconditional traps (always or never) */ > -static bool check_unconditional_trap(DisasContext *ctx) > +static int TO2tcg[32] =3D { > + TCG_COND_NEVER, /* no condition */ > + TCG_COND_GTU, /* 0x01 u> */ > + TCG_COND_LTU, /* 0x02 u< */ > + TCG_COND_NE, /* 0x03 u< or u> -> NE */ > + TCG_COND_EQ, /* 0x04 =3D */ > + TCG_COND_GEU, /* 0x05 u> or =3D */ > + TCG_COND_LEU, /* 0x06 u< or =3D */ > + TCG_COND_ALWAYS,/* 0x07 u< or u> or =3D -> ALWAYS */ > + TCG_COND_GT, /* 0x08 > */ > + -1, /* 0x09 > or u> -> weird */ > + -1, /* 0x0a > or u< -> weird */ > + -1, /* 0x0b > or u< or u> -> weird */ > + TCG_COND_GE, /* 0x0c > or =3D */ > + -1, /* 0x0d > or =3D or u> */ > + -1, /* 0x0e > or =3D or u< */ > + -1, /* 0x0f > or =3D or u> or u< */ > + TCG_COND_LT, /* 0x10 < */ > + -1, /* 0x11 < or u> -> weird */ > + -1, /* 0x12 < or u< -> weird */ > + -1, /* 0x13 < or u< or u> -> weird */ > + TCG_COND_LE, /* 0x14 < or =3D */ > + -1, /* 0x15 < or =3D or u> -> weird */ > + -1, /* 0x16 < or =3D or u< -> weird */ > + TCG_COND_ALWAYS,/* 0x17 < or =3D or u< or u> -> ALWAYS */ > + TCG_COND_NE, /* 0x18 < or > -> NE */ > + -1, /* 0x19 < or > or u> -> weird */ > + -1, /* 0x1a < or > or u< -> weird */ > + -1, /* 0x1b < or > or u> or u< -> weird */ > + TCG_COND_ALWAYS,/* 0x1c < or > or =3D -> ALWAYS */ > + TCG_COND_ALWAYS,/* 0x1d < or > or =3D or u> -> ALWAYS */ > + TCG_COND_ALWAYS,/* 0x1e < or > or =3D or u< -> ALWAYS */ > + TCG_COND_ALWAYS,/* 0x1f < or > or =3D or u< -> ALWAYS */ > +}; > + > +#define TRAP_UNCOND (-1) > +#define TRAP_HELPER (-2) > + > +static int precheck_trap(DisasContext *ctx) > { > - /* Trap never */ > - if (TO(ctx->opcode) =3D=3D 0) { > - return true; > + int cond =3D TO2tcg[TO(ctx->opcode)]; > + > + /* Weird traps go to helper */ > + if (cond < 0) { > + return TRAP_HELPER; > } > - /* Trap always */ > - if (TO(ctx->opcode) =3D=3D 31) { > + /* Unconditionals */ > + if (cond =3D=3D TCG_COND_ALWAYS) { > gen_exception_err(ctx, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); > - return true; > + return TRAP_UNCOND; > } > - return false; > + if (cond =3D=3D TCG_COND_NEVER) { > + return TRAP_UNCOND; > + } > + /* Invert the condition as we branch over the exception when the > + * condition is *not* met > + */ > + return tcg_invert_cond(cond); > +} > + > +static void gen_trap(DisasContext *ctx) > +{ > + TCGv_i32 t0, t1; > + > + t0 =3D tcg_const_i32(POWERPC_EXCP_PROGRAM); > + t1 =3D tcg_const_i32(POWERPC_EXCP_TRAP); > + gen_update_nip(ctx, ctx->nip - 4); > + gen_helper_raise_exception_err(cpu_env, t0, t1); > + tcg_temp_free_i32(t0); > + tcg_temp_free_i32(t1); > } > =20 > /* tw */ > static void gen_tw(DisasContext *ctx) > { > - TCGv_i32 t0; > + int cond =3D precheck_trap(ctx); > + TCGLabel *l1; > + TCGv t0; > + TCGv t1; > =20 > - if (check_unconditional_trap(ctx)) { > + if (cond =3D=3D TRAP_UNCOND) { > + return; > + } else if (cond =3D=3D TRAP_HELPER) { > + TCGv_i32 trapop =3D tcg_const_i32(TO(ctx->opcode)); > + gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], > + cpu_gpr[rB(ctx->opcode)], trapop); > + tcg_temp_free_i32(trapop); > return; > } > - t0 =3D tcg_const_i32(TO(ctx->opcode)); > - gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opc= ode)], > - t0); > - tcg_temp_free_i32(t0); > + l1 =3D gen_new_label(); > + t0 =3D tcg_temp_new(); > + t1 =3D tcg_temp_new(); > + tcg_gen_ext32s_tl(t0, cpu_gpr[rA(ctx->opcode)]); > + tcg_gen_ext32s_tl(t1, cpu_gpr[rB(ctx->opcode)]); > + tcg_gen_brcond_tl(cond, t0, t1, l1); > + gen_trap(ctx); > + gen_set_label(l1); > + tcg_temp_free(t0); > + tcg_temp_free(t1); > } > =20 > /* twi */ > static void gen_twi(DisasContext *ctx) > { > + int cond =3D precheck_trap(ctx); > + TCGLabel *l1; > TCGv t0; > - TCGv_i32 t1; > =20 > - if (check_unconditional_trap(ctx)) { > + if (cond =3D=3D TRAP_UNCOND) { > + return; > + } else if (cond =3D=3D TRAP_HELPER) { > + TCGv_i32 trapop =3D tcg_const_i32(TO(ctx->opcode)); > + t0 =3D tcg_const_tl(SIMM(ctx->opcode)); > + gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, trapop); > + tcg_temp_free_i32(trapop); > + tcg_temp_free(t0); > return; > } > - t0 =3D tcg_const_tl(SIMM(ctx->opcode)); > - t1 =3D tcg_const_i32(TO(ctx->opcode)); > - gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); > + l1 =3D gen_new_label(); > + t0 =3D tcg_temp_new(); > + tcg_gen_ext32s_tl(t0, cpu_gpr[rA(ctx->opcode)]); > + tcg_gen_brcondi_tl(cond, t0, SIMM(ctx->opcode), l1); > + gen_trap(ctx); > + gen_set_label(l1); > tcg_temp_free(t0); > - tcg_temp_free_i32(t1); > } > =20 > #if defined(TARGET_PPC64) > /* td */ > static void gen_td(DisasContext *ctx) > { > - TCGv_i32 t0; > + int cond =3D precheck_trap(ctx); > + TCGLabel *l1; > =20 > - if (check_unconditional_trap(ctx)) { > + if (cond =3D=3D TRAP_UNCOND) { > + return; > + } else if (cond =3D=3D TRAP_HELPER) { > + TCGv_i32 trapop =3D tcg_const_i32(TO(ctx->opcode)); > + gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], > + cpu_gpr[rB(ctx->opcode)], trapop); > + tcg_temp_free_i32(trapop); > return; > } > - t0 =3D tcg_const_i32(TO(ctx->opcode)); > - gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opc= ode)], > - t0); > - tcg_temp_free_i32(t0); > + l1 =3D gen_new_label(); > + tcg_gen_brcond_tl(cond, cpu_gpr[rA(ctx->opcode)], > + cpu_gpr[rB(ctx->opcode)], l1); > + gen_trap(ctx); > + gen_set_label(l1); > } > =20 > /* tdi */ > static void gen_tdi(DisasContext *ctx) > { > - TCGv t0; > - TCGv_i32 t1; > + int cond =3D precheck_trap(ctx); > + TCGLabel *l1; > =20 > - if (check_unconditional_trap(ctx)) { > + if (cond =3D=3D TRAP_UNCOND) { > + return; > + } else if (cond =3D=3D TRAP_HELPER) { > + TCGv_i32 trapop =3D tcg_const_i32(TO(ctx->opcode)); > + TCGv t0 =3D tcg_const_tl(SIMM(ctx->opcode)); > + gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, trapop); > + tcg_temp_free_i32(trapop); > + tcg_temp_free(t0); > return; > } > - t0 =3D tcg_const_tl(SIMM(ctx->opcode)); > - t1 =3D tcg_const_i32(TO(ctx->opcode)); > - gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); > - tcg_temp_free(t0); > - tcg_temp_free_i32(t1); > + l1 =3D gen_new_label(); > + tcg_gen_brcondi_tl(cond, cpu_gpr[rA(ctx->opcode)], SIMM(ctx->opcode)= , l1); > + gen_trap(ctx); > + gen_set_label(l1); > } > -#endif > +#endif /* defined(TARGET_PPC64) */ > =20 > /*** Processor control = ***/ > =20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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