From: Bjorn Helgaas <helgaas@kernel.org>
To: Joao Pinto <Joao.Pinto@synopsys.com>
Cc: jingoohan1@gmail.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, jszhang@marvell.com
Subject: Re: [PATCH v4 3/3] pcie-designware: fix typo
Date: Tue, 9 Aug 2016 11:54:28 -0500 [thread overview]
Message-ID: <20160809165428.GB27301@localhost> (raw)
In-Reply-To: <bba00c66a124b80c2bc259b3d2f78e561c3df27a.1470758382.git.jpinto@synopsys.com>
Hi Joao,
On Tue, Aug 09, 2016 at 05:35:34PM +0100, Joao Pinto wrote:
> Simple fix typo.
This patch actually does more than fix a typo. Not sure if you
intended to split this into separate patches, or to write a better
changelog for this one. If these code changes are related and we have
a good changelog, I don't mind if the typo fix is included as an
incidental change.
Bjorn
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> changes v1->v4:
> - Nothing changed. Just to keep up patch set version.
>
> drivers/pci/host/pcie-designware.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index 3fb9036..7731eda 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -36,7 +36,7 @@
> #define LINK_WAIT_IATU_MIN 9000
> #define LINK_WAIT_IATU_MAX 10000
>
> -/* Synopsis specific PCIE configuration registers */
> +/* Synopsys specific PCIE configuration registers */
> #define PCIE_PORT_LINK_CONTROL 0x710
> #define PORT_LINK_MODE_MASK (0x3f << 16)
> #define PORT_LINK_MODE_1_LANES (0x1 << 16)
> @@ -253,7 +253,7 @@ static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
> }
>
> if (val == PCIE_ATU_ENABLE)
> - break;
> + return;
>
> usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
> }
> @@ -646,11 +646,11 @@ int dw_pcie_host_init(struct pcie_port *pp)
> }
> }
>
> + pp->iatu_unroll_status = dw_pcie_get_atu_mode(pp);
> +
> if (pp->ops->host_init)
> pp->ops->host_init(pp);
>
> - pp->iatu_unroll_status = dw_pcie_get_atu_mode(pp);
> -
> pp->root_bus_nr = pp->busn->start;
> if (IS_ENABLED(CONFIG_PCI_MSI)) {
> bus = pci_scan_root_bus_msi(pp->dev, pp->root_bus_nr,
> --
> 1.8.1.5
>
next prev parent reply other threads:[~2016-08-09 16:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-09 16:35 [PATCH v4 0/3] pcie-designware: add iATU unroll feature Joao Pinto
2016-08-09 16:35 ` [PATCH v4 1/3] pcie-designware: move definitions Joao Pinto
2016-08-09 16:35 ` [PATCH v4 2/3] pcie-designware: add iATU Unroll feature Joao Pinto
2016-08-09 16:35 ` [PATCH v4 3/3] pcie-designware: fix typo Joao Pinto
2016-08-09 16:54 ` Bjorn Helgaas [this message]
2016-08-10 9:27 ` Joao Pinto
-- strict thread matches above, loose matches on Subject: below --
2016-08-10 10:02 [PATCH v5 0/3] pcie-designware: add iATU unroll feature Joao Pinto
2016-08-10 10:00 ` [PATCH v4 3/3] pcie-designware: fix typo Joao Pinto
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160809165428.GB27301@localhost \
--to=helgaas@kernel.org \
--cc=Joao.Pinto@synopsys.com \
--cc=jingoohan1@gmail.com \
--cc=jszhang@marvell.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.