diff for duplicates of <20160818212444.GQ27353@localhost> diff --git a/a/content_digest b/N1/content_digest index 3e8366e..0d61c5a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,21 +1,22 @@ "ref\01470297128-6213-1-git-send-email-shawn.lin@rock-chips.com\0" "ref\01470297128-6213-2-git-send-email-shawn.lin@rock-chips.com\0" - "From\0Bjorn Helgaas <helgaas@kernel.org>\0" + "ref\01470297128-6213-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org\0" + "From\0Bjorn Helgaas <helgaas-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" "Subject\0Re: [PATCH v9 2/2] PCI: Rockchip: Add Rockchip PCIe controller support\0" "Date\0Thu, 18 Aug 2016 16:24:44 -0500\0" - "To\0Shawn Lin <shawn.lin@rock-chips.com>\0" - "Cc\0Bjorn Helgaas <bhelgaas@google.com>" - Marc Zyngier <marc.zyngier@arm.com> - linux-pci@vger.kernel.org - Arnd Bergmann <arnd@arndb.de> - linux-kernel@vger.kernel.org - linux-rockchip@lists.infradead.org - Heiko Stuebner <heiko@sntech.de> - Doug Anderson <dianders@chromium.org> - Wenrui Li <wenrui.li@rock-chips.com> - Rob Herring <robh+dt@kernel.org> - devicetree@vger.kernel.org - " Brian Norris <briannorris@chromium.org>\0" + "To\0Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0" + "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" + Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> + Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> + Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> + Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org> + linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Wenrui Li <wenrui.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> + linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + " Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>\0" "\00:1\0" "b\0" "Hi Shawn,\n" @@ -45,4 +46,4 @@ "> +\t There is 1 internal PCIe port available to support GEN2 with\n" "> +\t 4 slots." -e085ca05d6bb3b7abe24b4d4d949da931a757a7338d2ebe05fdcc62f9ee67bc1 +246f3a2b5db935ec00120f1190d5335b70cfe5fe3587483d94d74f45b677b894
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.