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From: Arnd Bergmann <arnd@arndb.de>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
	linux-soc@vger.kernel.org, Andy Gross <andy.gross@linaro.org>,
	David Brown <david.brown@linaro.org>,
	Stephen Boyd <sboyd@codeaurora.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>
Subject: Re: [PATCH 1/4] soc: qcom: add an EBI2 device tree bindings
Date: Mon, 29 Aug 2016 13:51:12 +0200	[thread overview]
Message-ID: <201608291351.12915.arnd@arndb.de> (raw)
In-Reply-To: <CACRpkdZ=HU6j3=Ye4dm=tFU=KmG54bq06KDfxPViWUouOA=jOA@mail.gmail.com>

On Thursday 18 August 2016, Linus Walleij wrote:
> On Mon, Aug 8, 2016 at 11:32 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Monday, August 8, 2016 11:24:02 PM CEST Linus Walleij wrote:

> 
> So two devices "foo" and "bar" on the EBI2 bus, in the old
> scheme.
> 
> So I need to encode the CS in the first cell of the reg for
> foo-ebi2, and get rid of chipselect = <2> fine:
> 
> ebi2@1a100000 {
>        compatible = "qcom,msm8660-ebi2";
>        #address-cells = <1>;
>        #size-cells = <1>;
>        (...)
>        cs2@1b800000 {
>                #address-cells = <2>;
>                #size-cells = <1>;
>                qcom,xmem-recovery-cycles = <5>;
>                foo-ebi2@1b800000 {
>                        compatible = "foo";
>                        reg = <2 0x1b800000 0x100>;
>                        (...)
>                };
>                bar-ebi2@1ba00000 {
>                        compatible = "bar";
>                        reg = <2 0x1ba00000 0x100>;
>                        (...)
>                };
>        };
> };
> 
> This is not looking good at all. First: the configuration settings for
> the chipselect (i.e. all devices below it, both "foo" and "bar" are
> just floating in space. When parsing the tree how should you know
> what chipselect to set up the stuff on? Shall I check the child nodes
> first value in the reg property and then make a majority vote on what
> chipselect they apply to or what? That doesn't make sense.

I would have one node per chip-select and then put the devices on
that CS below it, with #address-cells=1 again.

> So I assume doing away with the chipselect node altogether would
> be prefered. But then: where do I put stuff like "qcom,xmem-recovery-cycles"
> that apply to the whole chipselect, not just a single subdevice on that
> chipselect? I certainly cannot encode it in the reg since it needs
> to be the same for all devices and it's not about addressing.
> 
> The only thing I can reasonably come up with would be this:
> 
> ebi2@1a100000 {
>        compatible = "qcom,msm8660-ebi2";
>        #address-cells = <2>;
>        #size-cells = <1>;
>        qcom,xmem-recovery-cycles = <0>, <0>, <5>, <0>, <0>, <0>;

No, better put the settings into one device per cs.

> So the chip select settings are shoehorned into an array in the top
> node that is then indexed to find the settings for cs0, cs1 etc.
> 
> There will be 6 such arrays for the different per-cs settings.
> 
> Is this what you want? I kind of thought the hierarchical model
> was nice since each device was below its chipselect node, but
> I understand that it breaks the pattern of other similar bus drivers.

Nothing wrong with having a hierarchy here, what I'm interested
in is making the addressing reflect what the hardware actually
does. With the empty "ranges", it looks like the entire 32-bit
address is getting exposed to the external bus, which is usually
not how things work: instead, each "cs" line gets raised by an I/O
operation on a particular CPU address range, and that range should
be part of the "ranges" propert of the main bus node, and the
externally visible addresses should be the translated addresses
in the child bus representation in DT.

	Arnd

WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] soc: qcom: add an EBI2 device tree bindings
Date: Mon, 29 Aug 2016 13:51:12 +0200	[thread overview]
Message-ID: <201608291351.12915.arnd@arndb.de> (raw)
In-Reply-To: <CACRpkdZ=HU6j3=Ye4dm=tFU=KmG54bq06KDfxPViWUouOA=jOA@mail.gmail.com>

On Thursday 18 August 2016, Linus Walleij wrote:
> On Mon, Aug 8, 2016 at 11:32 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Monday, August 8, 2016 11:24:02 PM CEST Linus Walleij wrote:

> 
> So two devices "foo" and "bar" on the EBI2 bus, in the old
> scheme.
> 
> So I need to encode the CS in the first cell of the reg for
> foo-ebi2, and get rid of chipselect = <2> fine:
> 
> ebi2 at 1a100000 {
>        compatible = "qcom,msm8660-ebi2";
>        #address-cells = <1>;
>        #size-cells = <1>;
>        (...)
>        cs2 at 1b800000 {
>                #address-cells = <2>;
>                #size-cells = <1>;
>                qcom,xmem-recovery-cycles = <5>;
>                foo-ebi2 at 1b800000 {
>                        compatible = "foo";
>                        reg = <2 0x1b800000 0x100>;
>                        (...)
>                };
>                bar-ebi2 at 1ba00000 {
>                        compatible = "bar";
>                        reg = <2 0x1ba00000 0x100>;
>                        (...)
>                };
>        };
> };
> 
> This is not looking good at all. First: the configuration settings for
> the chipselect (i.e. all devices below it, both "foo" and "bar" are
> just floating in space. When parsing the tree how should you know
> what chipselect to set up the stuff on? Shall I check the child nodes
> first value in the reg property and then make a majority vote on what
> chipselect they apply to or what? That doesn't make sense.

I would have one node per chip-select and then put the devices on
that CS below it, with #address-cells=1 again.

> So I assume doing away with the chipselect node altogether would
> be prefered. But then: where do I put stuff like "qcom,xmem-recovery-cycles"
> that apply to the whole chipselect, not just a single subdevice on that
> chipselect? I certainly cannot encode it in the reg since it needs
> to be the same for all devices and it's not about addressing.
> 
> The only thing I can reasonably come up with would be this:
> 
> ebi2 at 1a100000 {
>        compatible = "qcom,msm8660-ebi2";
>        #address-cells = <2>;
>        #size-cells = <1>;
>        qcom,xmem-recovery-cycles = <0>, <0>, <5>, <0>, <0>, <0>;

No, better put the settings into one device per cs.

> So the chip select settings are shoehorned into an array in the top
> node that is then indexed to find the settings for cs0, cs1 etc.
> 
> There will be 6 such arrays for the different per-cs settings.
> 
> Is this what you want? I kind of thought the hierarchical model
> was nice since each device was below its chipselect node, but
> I understand that it breaks the pattern of other similar bus drivers.

Nothing wrong with having a hierarchy here, what I'm interested
in is making the addressing reflect what the hardware actually
does. With the empty "ranges", it looks like the entire 32-bit
address is getting exposed to the external bus, which is usually
not how things work: instead, each "cs" line gets raised by an I/O
operation on a particular CPU address range, and that range should
be part of the "ranges" propert of the main bus node, and the
externally visible addresses should be the translated addresses
in the child bus representation in DT.

	Arnd

  reply	other threads:[~2016-08-29 11:51 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-08 21:24 [PATCH 0/4] Qualcomm MSM8660/APQ8060 EBI2 and ethernet support Linus Walleij
2016-08-08 21:24 ` Linus Walleij
     [not found] ` <1470691445-27571-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-08-08 21:24   ` [PATCH 1/4] soc: qcom: add an EBI2 device tree bindings Linus Walleij
2016-08-08 21:24     ` Linus Walleij
     [not found]     ` <1470691445-27571-2-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-08-08 21:32       ` Arnd Bergmann
2016-08-08 21:32         ` Arnd Bergmann
2016-08-18  8:14         ` Linus Walleij
2016-08-18  8:14           ` Linus Walleij
2016-08-29 11:51           ` Arnd Bergmann [this message]
2016-08-29 11:51             ` Arnd Bergmann
2016-08-29 12:24             ` Rob Herring
2016-08-29 12:24               ` Rob Herring
     [not found]               ` <CAL_JsqJPckLGDSiqnspvtP_=t+yZ+0vO-8MxGB6x7poOZiyK+Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-08-29 13:13                 ` Linus Walleij
2016-08-29 13:13                   ` Linus Walleij
2016-08-29 13:42                   ` Arnd Bergmann
2016-08-29 13:42                     ` Arnd Bergmann
     [not found]                     ` <201608291542.55387.arnd-r2nGTMty4D4@public.gmane.org>
2016-08-29 16:18                       ` Linus Walleij
2016-08-29 16:18                         ` Linus Walleij
     [not found]                   ` <CACRpkdaRPa=tCH2FQUOUzp0Q2YvdLNA7R2y3w==sH40DwJ2vGA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-08-29 14:06                     ` Rob Herring
2016-08-29 14:06                       ` Rob Herring
2016-08-29 17:21                       ` Linus Walleij
2016-08-29 17:21                         ` Linus Walleij
2016-08-29 22:51                         ` Rob Herring
2016-08-29 22:51                           ` Rob Herring
     [not found]             ` <201608291351.12915.arnd-r2nGTMty4D4@public.gmane.org>
2016-08-29 12:45               ` Linus Walleij
2016-08-29 12:45                 ` Linus Walleij
2016-08-10 20:31       ` Rob Herring
2016-08-10 20:31         ` Rob Herring
2016-08-08 21:24 ` [PATCH 2/4] soc: qcom: add EBI2 driver Linus Walleij
2016-08-08 21:24   ` Linus Walleij
2016-08-08 21:34   ` Arnd Bergmann
2016-08-08 21:34     ` Arnd Bergmann
2016-08-08 23:33   ` Stephen Boyd
2016-08-08 23:33     ` Stephen Boyd
2016-08-18 11:27     ` Linus Walleij
2016-08-18 11:27       ` Linus Walleij
2016-08-18 12:07   ` Lothar Waßmann
2016-08-18 12:07     ` Lothar Waßmann
2016-08-24  9:09     ` Linus Walleij
2016-08-24  9:09       ` Linus Walleij
2016-08-08 21:24 ` [PATCH 3/4] ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSI Linus Walleij
2016-08-08 21:24   ` Linus Walleij
2016-08-08 21:24 ` [PATCH 4/4] ARM: dts: add SMSC ethernet on the APQ8060 Dragonboard Linus Walleij
2016-08-08 21:24   ` Linus Walleij
  -- strict thread matches above, loose matches on Subject: below --
2016-07-08  9:11 [PATCH 0/4] soc: qcom: add EBI2 support and do ethernet Linus Walleij
2016-07-08  9:11 ` [PATCH 1/4] soc: qcom: add an EBI2 device tree bindings Linus Walleij
2016-07-08  9:11   ` Linus Walleij
2016-07-15 19:19   ` Rob Herring
2016-07-15 19:19     ` Rob Herring

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