From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH 1/4] soc: qcom: add an EBI2 device tree bindings Date: Mon, 29 Aug 2016 15:42:55 +0200 Message-ID: <201608291542.55387.arnd@arndb.de> References: <1470691445-27571-1-git-send-email-linus.walleij@linaro.org> Mime-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: Received: from mout.kundenserver.de ([212.227.17.13]:52875 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932908AbcH2Nnf (ORCPT ); Mon, 29 Aug 2016 09:43:35 -0400 In-Reply-To: Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Linus Walleij Cc: Rob Herring , Mark Rutland , "linux-arm-kernel@lists.infradead.org" , "linux-arm-msm@vger.kernel.org" , linux-soc@vger.kernel.org, Andy Gross , David Brown , Stephen Boyd , "devicetree@vger.kernel.org" , Bjorn Andersson On Monday 29 August 2016, Linus Walleij wrote: > Gnah. Each chipselect can (in theory) house several memory-mapped > devices at different offsets. Like two ethernet controllers. It gets a bit > weird. How theoretical is that setup though? From looking at other external bus interfaces that we support, I can't find anyone actually doing this. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Mon, 29 Aug 2016 15:42:55 +0200 Subject: [PATCH 1/4] soc: qcom: add an EBI2 device tree bindings In-Reply-To: References: <1470691445-27571-1-git-send-email-linus.walleij@linaro.org> Message-ID: <201608291542.55387.arnd@arndb.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Monday 29 August 2016, Linus Walleij wrote: > Gnah. Each chipselect can (in theory) house several memory-mapped > devices at different offsets. Like two ethernet controllers. It gets a bit > weird. How theoretical is that setup though? From looking at other external bus interfaces that we support, I can't find anyone actually doing this. Arnd